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Technology functions
3.2 Pulse generators
CPU 1512C-1 PN (6ES7512-1CK01-0AB0)
Manual, 12/2017, A5E40898741-AA
51
Offset from start
address
Parameter
Meaning
Byte 15
STS_M_INTERVAL
Bit 7: Count pulse detected in previous measuring interval
EVENT_CAP
Bit 6: Capture event has occurred
EVENT_SYNC
Bit 5: Synchronization has occurred
EVENT_CMP1
Bit 4: Comparison event for DQ1 has occurred
EVENT_CMP0
Bit 3: Comparison event for DQ0 has occurred
EVENT_OFLW
Bit 2: Overflow has occurred
EVENT_UFLW
Bit 1: Underflow has occurred
EVENT_ZERO
Bit 0: Zero crossing has occurred
3.2
Pulse generators
3.2.1
Operating modes
3.2.1.1
Operating mode: Pulse-width modulation (PWM)
Properties
The pulse-width modulation (PWM) mode of the compact CPU has the following technical
properties:
Minimum
Maximum
Standard output
High-speed output
deactivated
High-speed output
activated
Standard
output
High-speed
output deac-
tivated
High-speed
output acti-
vated
Pulse
duration
400 µs with load >
0.1 A
1)
500 µs with load
≥
2m A
1)
20 µs with load
> 0.1 A
1)
40 µs with load
≥
2m A
1)
2 µs
1)
10,000,000 µs (10 s)
Period
duration
10 ms
2)
100
μs
2)
10
μs
1)
A lower value is theoretically possible but, depending on the connected load, the output voltage can no longer be output
as complete rectangular pulse
2)
Load dependent
Summary of Contents for Simatic S7-1500 CPU 1512C-1 PN
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