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Signal Name
Pin No.
Signal Type
(Drive)
Selected By
Signal Description
IRQSER
AE18
I/O
PCIDV1
BAh[0] = 0
Serial interrupt Request: Bidirectional interrupt line for Compaq
style of serial IRQs.
SDCKE
O
PCIDV1
53h[4] = 1
SDRAM Clock Enable: This signal is asserted to put the SDRAM
into a "Stop" state. The BIOS can program FireStar to assert this
signal only in Suspend mode.
SOUT#
PCIDV1
BBh[0] = 1
Serial Output: Serial interrupt output line for Intel style of serial IRQs.
ISA DMA Arbiter Interface
DRQA/DRQ0
M24
I
PCIDV1
99h = 00h
Programmable DMA Request A/DRQ0: The DRQ is used to
request DMA service from the DMA controller.
This input defaults to DRQ0, however, it can be programmed to route
onto any internal DRQ by programming PCIDV1 C0h[2:0].
PIO25
I/O
(4mA)
PCIDV1
99h
¹
00h
Programmable Input/Output 25: See Section 3.3, "Programmable
I/O Pins", on page 33 for more details.
DRQB/DRQ1
M25
I
PCIDV1
9Ah = 00h
Programmable DMA Request B/DRQ1: The DRQ is used to
request DMA service from the DMA controller.
This input defaults to DRQ1, however, it can be programmed to route
onto any internal DRQ by programming PCIDV1 C0h[6:4].
PIO26
I/O
(4mA)
PCIDV1
9Ah
¹
00h
Programmable Input/Output 26: See Section 3.3, "Programmable
I/O Pins", on page 33 for more details.
DRQC/DRQ2
M26
I
PCIDV1
9Bh = 00h
Programmable DMA Request C/DRQ2: The DRQ is used to
request DMA service from the DMA controller.
This input defaults to DRQ0, however, it can be programmed to route
onto any internal DRQ by programming PCIDV1 C1h[2:0].
PIO27
I/O
(4mA)
PCIDV1
9Bh
¹
00h
Programmable Input/Output 27: See Section 3.3, "Programmable
I/O Pins", on page 33 for more details.
DRQD/DRQ3
L23
I
PCIDV
9Ch = 00h
Programmable DMA Request D/DRQ3: The DRQ is used to
request DMA service from the DMA controller.
This input defaults to DRQ3, however, it can be programmed to route
onto any internal DRQ by programming PCIDV1 C1h[6:4].
PIO28
I/O
(4mA)
PCIDV1
9Ch
¹
00h
Programmable Input/Output 28: See Section 3.3, "Programmable
I/O Pins", on page 33 for more details.
DRQE/DRQ5
L24
I
PCIDV1
9Dh = 00h
Programmable DMA Request E/DRQ5: The DRQ is used to
request DMA service from the DMA controller.
This input defaults to DRQ5, however, it can be programmed to route
onto any internal DRQ by programming PCIDV1 C2h[6:4].
PIO29
I/O
(4mA)
PCIDV1
9Dh
¹
00h
Programmable Input/Output 29: See Section 3.3, "Programmable
I/O Pins", on page 33 for more details.
DRQF/DRQ6
M25
I
PCIDV1
9Eh = 00h
Programmable DMA Request F/DRQ6: The DRQ is used to request
DMA service from the DMA controller.
This input defaults to DRQ6, however, it can be programmed to route
onto any internal DRQ by programming PCIDV1 C3h[2:0].
PIO30
I/O
(4mA)
PCIDV1
9Eh
¹
00h
Programmable Input/Output 30: See Section 3.3, "Programmable
I/O Pins", on page 33 for more details.
DRQG/DRQ7
L26
I
PCIDV1
9Fh = 00h
Programmable DMA Request G/DRQ6: The DRQ is used to
request DMA service from the DMA controller.
This input defaults to DRQ7, however, it can be programmed to route
onto any internal DRQ by programming PCIDV1 C3h[6:4].
PIO31
I/O (4mA)
PCIDV1
9Fh
¹
00h
Programmable Input/Output 31: See Section 3.3, "Programmable
I/O Pins", on page 33 for more details.
DACKA#/DACK0#
K22
O
Programmable DMA Acknowledge A/DACK0#: DACK# is used to
acknowledge DRQ to allow DMA transfer.
This input defaults to DACK0#, however, it can be programmed to
route onto any internal DACK# by programming PCIDV1 C0h[2:0].
PPWR4
PCIDV1
C0h[2:0] = 100
Peripheral power control Line 4: Peripheral power control lines 0
through 15 are latch outputs used to control external devices.
DACKB#/DACK1#
K23
O
Programmable DMA Acknowledge B/DACK1#: DACK# is used to
acknowledge DRQ to allow DMA transfer.
This input defaults to DACK1#, however, it can be programmed to
route onto any internal DACK# by programming PCIDV1 C0h[6:4].
PPWR5
PCIDV1
C0h[6:4] = 100
Peripheral power control Line 5
5 – 21
Summary of Contents for UP-5700
Page 139: ...1 UP 5700 Main PWB CHAPTER 10 PWB LAYOUT A side 10 1 ...
Page 140: ...2 UP 5700 CPU PWB A side UP 5700 CPU PWB B side 10 2 ...
Page 141: ...3 UP 5700 KEY I F PWB A side CN2 UP 5700 KEY I F PWB B side 10 3 ...
Page 144: ...For components produced in January 1998 and onward Parts side Solder side 10 6 ...
Page 145: ...7 2 Sub PWB Side A Side B 10 7 ...