Sharp AR-F152, Service Manual

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(2) ASIC (Signal table)
PIN No. Signal name IN/OUT Connected to Description
1 /SCANSP IN CPU (I/O) Scanner process interrupt signal
2 /PRSTART IN CPU Print start trigger signal
3 /TMEN IN CPU Toner motor ON/OFF
4 TMCLK IN CPU Toner motor reference clock
5 3.3V Power
6 CPUAD7 IN CPU CPU address bus
7 CPUAD6 IN CPU CPU address bus
8 GND Power
9 CPUAD5 IN CPU CPU address bus
10 CPUAD4 IN CPU CPU address bus
11 CPUAD3 IN CPU CPU address bus
12 CPUAD2 IN CPU CPU address bus
13 CPUAD1 IN CPU CPU address bus
14 /CPUSYNC OUT CPU Horizontal synchronization signal
15 /ASICINT OUT CPU Interruption request signal
16 /CS2 IN CPU CPU chip select signal
17 /RESET IN RESET IC Reset signal
18 5V Power
19 GND Power
20 3.3V Power
21 GND Power
22 MDATA15 IN/OUT DRAM Data bus of DRAM (page memory)
23 MDATA14 IN/OUT DRAM Data bus of DRAM (page memory)
24 MDATA13 IN/OUT DRAM Data bus of DRAM (page memory)
25 MDATA12 IN/OUT DRAM Data bus of DRAM (page memory)
26 MDATA11 IN/OUT DRAM Data bus of DRAM (page memory)
27 MDATA10 IN/OUT DRAM Data bus of DRAM (page memory)
28 MDATA9 IN/OUT DRAM Data bus of DRAM (page memory)
29 MDATA8 IN/OUT DRAM Data bus of DRAM (page memory)
30 MDATA7 IN/OUT DRAM Data bus of DRAM (page memory)
31 3.3V Power
32 MDATA6 IN/OUT DRAM Data bus of DRAM (page memory)
33 MDATA5 IN/OUT DRAM Data bus of DRAM (page memory)
34 GND Power
35 MDATA4 IN/OUT DRAM Data bus of DRAM (page memory)
36 MDATA3 IN/OUT DRAM Data bus of DRAM (page memory)
37 MDATA2 IN/OUT DRAM Data bus of DRAM (page memory)
38 MDATA1 IN/OUT DRAM Data bus of DRAM (page memory)
39 MDATA0 IN/OUT DRAM Data bus of DRAM (page memory)
40 /RAS0 OUT DRAM RAS signal 0 of DRAM (page memory)
41 /RAS1 OUT DRAM RAS signal 1 of DRAM (page memory)
42 /RAS2 OUT DRAM RAS signal 2 of DRAM (page memory)
43 /RAS64 OUT
DRAM control (for
panther)
(Reserved)
44 3.3V Power
45 /RAS16 OUT
DRAM control (for
panther)
(Reserved)
46 MAD0 OUT DRAM Address bus of DRAM (page memory)
AR-F152
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