10-5 SVP-EX52
Samsung Electronics
Schematic Diagram
10-5
R
D
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50
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R5009R
50
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R5082R
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R5032R
50
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50
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R5052R
50
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1/10W1/
10
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10
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R5051R
50
51
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R5023R
50
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1
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F
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1
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5
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F
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0
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1
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C
R5006R
50
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1
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V
0
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33ohm33
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m
R5025R
50
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R5083R
50
83
R5019R
50
19
33ohm33
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m
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hm
33ohm33
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m
R5037R
50
37
R5031R
50
31
R5030R
50
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m
P
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8
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33ohm33
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m
R5026R
50
26
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n
0
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6
1
1
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1
5
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F
p
0
3
5
0
1
5
C
33ohm33
oh
m
R5014R
50
14
R5015R
50
15
33ohm33
oh
m
33ohm33
oh
m
m
h
o
0
0
1
3
0
0
5
R
R5021R
50
21
m
h
o
2
2
5
0
0
5
R
R5040R
50
40
33ohm33
oh
m
R5039R
50
39
R5034R
50
34
33ohm33
oh
m
R5013R
50
13
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m
m
h
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2
2
1
7
0
5
R
33ohm33
oh
m
33ohm33
oh
m
R5017R
50
17
33ohm33
oh
m
R5016R
50
16
33ohm33
oh
m
R5022R
50
22
33ohm33
oh
m
R5029R
50
29
33ohm33
oh
m
R5012R
50
12
33ohm33
oh
m
33ohm33
oh
m
R5028R
50
28
33ohm33
oh
m
R5033R
50
33
3
N
I
V
V
0
5
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1
7
2
1
5
C
R5042R
50
42
8
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1
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D
A
7
1
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N
A
F
8
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5
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1
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3
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3
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m
h
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6
6
0
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R
m
h
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m
R5053R
50
53
3
0
0
5
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1/10W1/
10
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R5050R
50
50
P
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V
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V
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10
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m
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n
0
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1
5
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1
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0
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1
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V
0
8
0
5
R
m
h
o
K
2
.
1
F
u
1
7
1
1
5
C
DPIN0D
P
IN
0
Y6Y
6
DPIN1D
P
IN
1
DPIN16D
P
IN
16
Y7Y
7
Y8Y
8
DPIN17D
P
IN
17
DPIN_CLKD
P
IN
_C
LK
Y9Y
9
H
D
D
V
Q
M
D
D
V
8
.
1
D
V
V
0
1
DPIO6D
P
IO
6
DPIO1D
P
IO
1
Y17Y
17
Y18Y
18
NCN
C
NCN
C
Y19Y
19
Y2Y
2
DED
E
Y20Y
20
NCN
C
DPIN9D
P
IN
9
Y3Y
3
Y4Y
4
DPIN10D
P
IN
10
Y5Y
5
W9W
9
V
Y1Y
1
Y10Y
10
DPIN_HD
P
IN
_H
DPIO21D
P
IO
21
Y1
1
Y
11
Y12Y
12
DPIO20D
P
IO
20
DPIO14D
P
IO
14
Y13Y
13
Y14Y
14
DPIO13D
P
IO
13
DPIO7D
P
IO
7
Y15Y
15
Y16Y
16
H
W20W
20
NCN
C
DPIN8D
P
IN
8
W3W
3
W4W
4
DPIN1
1
D
P
IN
11
DPIN15D
P
IN
15
W5W
5
W6W
6
DPIN2D
P
IN
2
DPIN7D
P
IN
7
W7W
7
W8W
8
DPIN18D
P
IN
18
DPIN23D
P
IN
23
DPIO19D
P
IO
19
DPIO15D
P
IO
15
W13W
13
W14W
14
DPIO12D
P
IO
12
W15W
15
DPIO_CLKD
P
IO
_C
LK
W16W
16
DPIO5D
P
IO
5
DPIO0D
P
IO
0
W17W
17
W18W
18
NCN
C
NCN
C
W19W
19
W2W
2
V5V
5
V6V
6
DPIN3D
P
IN
3
DPIN6D
P
IN
6
V7V
7
V8V
8
DPIN19D
P
IN
19
DPIN22D
P
IN
22
V9V
9
MPUCS_FLDM
P
U
C
S
_F
LD
W1W
1
W10W
10
DPIN_VD
P
IN
_V
DPIO22D
P
IO
22
W1
1
W
11
W12W
12
DPIO4D
P
IO
4
DPIO_R
T0
D
P
IO
_R
T
0
V17V
17
V18V
18
NCN
C
NCN
C
V19V
19
V2V
2
SDAS
D
A
V20V
20
NCN
C
PWMP
W
M
V3V
3
V4V
4
DPIN12D
P
IN
12
DPIN14D
P
IN
14
U9U
9
V5SFV
5S
F
V1V
1
V10V
10
DPIN_DED
P
IN
_D
E
DPIO23D
P
IO
23
V1
1
V
11
DPIO18D
P
IO
18
V12V
12
DPIO16D
P
IO
16
V13V
13
V14V
14
DPIO1
1
D
P
IO
11
DPIO8D
P
IO
8
V15V
15
V16V
16
TESTMODET
E
S
T
M
O
D
E
U20U
20
NCN
C
RESETR
E
S
E
T
U3U
3
U4U
4
SCLS
C
L
DPIN13D
P
IN
13
U5U
5
U6U
6
DPIN4D
P
IN
4
DPIN5D
P
IN
5
U7U
7
U8U
8
DPIN20D
P
IN
20
DPIN21D
P
IN
21
VDDHV
D
D
H
DPIO17D
P
IO
17
U13U
13
U14U
14
DPIO10D
P
IO
10
DPIO9D
P
IO
9
U15U
15
U16U
16
DPIO3D
P
IO
3
DPIO_R
T1
D
P
IO
_R
T
1
U17U
17
U18U
18
DPIO_R
T2
D
P
IO
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T
2
NCN
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U19U
19
U2U
2
S
H
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5
T
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D
D
V
6
T
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8
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1
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10
DPIN_FLDD
P
IN
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VDDHV
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11
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12
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2
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6
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5
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V
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T
P
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V
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11
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K12K
12
K13K
13
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K17K
17
VDDMV
D
D
M
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18
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1
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A
11
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19
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20
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0
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6
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DD_ADC1
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1
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10
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J1J1
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J10J1
0
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1
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2
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J13J1
3
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J17J1
7
VDDMV
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J18J1
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MA10M
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9
MA9M
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9
H19H
19
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VREFN_2V
R
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F
N
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2
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20
MD8M
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3
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SS_ADC2
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4
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DD_ADC2
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VDDH_CPUV
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R
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13
VDDCV
D
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H16H
16
VDDCV
D
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H17H
17
MA8M
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18
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G17G
17
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18
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6
G19G
19
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D
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2
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R
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20
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D
10
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3
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R
_R
1
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2
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5
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5
F19F
19
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MPUCSONM
P
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C
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20
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4
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DD_ADC3
A
V
D
D
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C
3
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5
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SS_ADC3
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V
S
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C
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1
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R
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N
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16
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D
D
C
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6
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D
D
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7
MPUGPIO3M
P
U
G
P
IO
3
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MPUGPIO4M
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IO
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D
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(
M
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3
(
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Q
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3
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2
1
(
D
M
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3
1
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4
1
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5
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D
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6
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(
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7
1
(
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M
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8
1
(
D
M
_
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9
1
(
D
M
_
R
D
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0
2
(
D
M
_
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D
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1
2
(
D
M
_
R
D
D
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2
2
(
D
M
_
R
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3
2
(
D
M
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4
2
(
D
M
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5
2
(
D
M
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6
2
(
D
M
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7
2
(
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M
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8
2
(
D
M
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9
2
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D
M
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0
3
(
D
M
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1
3
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M
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D
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1
3
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0
(
M
Q
D
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R
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DDR_MA(10)D
D
R
_M
A
(1
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DDR_MA(9)D
D
R
_M
A
(9
)
DDR_MA(8)D
D
R
_M
A
(8
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DDR_MA(7)D
D
R
_M
A
(7
)
DDR_MA(6)D
D
R
_M
A
(6
)
DDR_MA(5)D
D
R
_M
A
(5
)
DDR_MA(4)D
D
R
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A
(4
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DDR_MA(3)D
D
R
_M
A
(3
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)
2
(
A
M
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R
D
D
DNIE_RIN(1)D
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9
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7
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0
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A
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7
(
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C
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6
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D
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5
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D
C
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(
D
C
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C
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0
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0
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M
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R
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DDR_MD(8)D
D
R
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(8
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DDR_MD(9)D
D
R
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D
(9
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DDR_MD(10)D
D
R
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(1
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DNIE_GIN(1)D
N
IE
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IN
(1
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DNIE_GIN(0)D
N
IE
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(0
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9
:
0
(
N
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G
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E
I
N
D
DNIE_RIN(9)D
N
IE
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(9
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DNIE_RIN(8)D
N
IE
_R
IN
(8
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DNIE_RIN(7)D
N
IE
_R
IN
(7
)
DNIE_RIN(6)D
N
IE
_R
IN
(6
)
DNIE_RIN(5)D
N
IE
_R
IN
(5
)
DNIE_RIN(4)D
N
IE
_R
IN
(4
)
DNIE_RIN(3)D
N
IE
_R
IN
(3
)
DNIE_RIN(2)D
N
IE
_R
IN
(2
)
DNIE_BIN(2)D
N
IE
_B
IN
(2
)
DNIE_BIN(1)D
N
IE
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IN
(1
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DNIE_BIN(0)D
N
IE
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(0
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9
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0
(
N
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B
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N
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DNIE_GIN(9)D
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IE
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(9
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DNIE_GIN(8)D
N
IE
_G
IN
(8
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DNIE_GIN(7)D
N
IE
_G
IN
(7
)
DNIE_GIN(6)D
N
IE
_G
IN
(6
)
DNIE_GIN(5)D
N
IE
_G
IN
(5
)
DNIE_GIN(4)D
N
IE
_G
IN
(4
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DNIE_GIN(3)D
N
IE
_G
IN
(3
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DNIE_GIN(2)D
N
IE
_G
IN
(2
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#
S
A
C
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D
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3
(
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Q
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2
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DNIE_BIN(9)D
N
IE
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(9
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DNIE_BIN(8)D
N
IE
_B
IN
(8
)
DNIE_BIN(7)D
N
IE
_B
IN
(7
)
DNIE_BIN(6)D
N
IE
_B
IN
(6
)
DNIE_BIN(5)D
N
IE
_B
IN
(5
)
DNIE_BIN(4)D
N
IE
_B
IN
(4
)
DNIE_BIN(3)D
N
IE
_B
IN
(3
)
K
L
C
_
P
V
S
VSOUT_EXV
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O
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T
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X
HSOUT_EXH
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CLKOUT_EXC
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2
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3
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3
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K
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#
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3
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SVP_R(4)S
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(4
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SVP_R(5)S
V
P
_R
(5
)
SVP_B(4)S
V
P
_B
(4
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SVP_B(6)S
V
P
_B
(6
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SVP_G(3)S
V
P
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(3
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SVP_G(6)S
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P
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(6
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SVP_R(3)S
V
P
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(3
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SVP_R(6)S
V
P
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(6
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SVP_B(0)S
V
P
_B
(0
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SVP_B(3)S
V
P
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(3
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SVP_B(7)S
V
P
_B
(7
)
SVP_G(2)S
V
P
_G
(2
)
SVP_G(7)S
V
P
_G
(7
)
SVP_R(2)S
V
P
_R
(2
)
SVP_B(1)S
V
P
_B
(1
)
SVP_B(2)S
V
P
_B
(2
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SVP_R(0)S
V
P
_R
(0
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)
7
:
0
(
R
_
P
V
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:
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DDR_MD(6)D
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R
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(6
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SVP_R(1)S
V
P
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(1
)
SVP_G(0)S
V
P
_G
(0
)
SVP_G(1)S
V
P
_G
(1
)
SVP_R(7)S
V
P
_R
(7
)
SVP_B(5)S
V
P
_B
(5
)
SVP_G(4)S
V
P
_G
(4
)
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Summary of Contents for HP-R5052
Page 14: ...1 6 Samsung Electronics MEMO ...
Page 40: ...3 20 Samsung Electronics MEMO ...
Page 43: ...Samsung Electronics 5 2 MEMO ...
Page 51: ...6 8 Samsung Electronics MEMO ...
Page 59: ...8 4 Samsung Electronics MEMO ...
Page 61: ...9 2 Samsung Electronics MEMO ...
Page 84: ...11 12 Samsung Electronics MEMO ...
Page 92: ...12 8 Samsung Electronics MEMO ...
Page 112: ...Circuit Description 13 20 Samsung Electronics Drive Board Connector Layout 1 X Main ...
Page 122: ...13 30 Samsung Electronics MEMO ...