Additional basics on remote control
R&S
®
NGU
204
User Manual 1179.2531.02 ─ 03
The
CONDition
register delivers a "1" (first bit set) in constant current mode (CC) and
a "2" (second bit set) in constant voltage mode (CV).
If the correct channel is selected and the red LED of the channel button lights up (CC
mode), the query of the
CONDition
register must deliver a "1".
Example:
STAT:QUES:ISUM1:COND?
EVENt
●
The
EVENt
status register is set (1) until it is queried. After reading (query), the
EVENt
status register is set to zero.
The description of registers is only used for general explanation. Due to the complexity,
we recommend the general accessible SCPI standard document for more detailed
information.
Figure A-2: Structure of the status:QUEStionable:INSTrument register
Event Status Register (ESR) and Event Status Enable Register (ESE)
The ESR is defined in IEEE 488.2. It can be compared with the
EVENt
part of a SCPI
register. The event status register can be read out using the command
*ESR?
. The
ESE corresponds to the
ENABle
part of a SCPI register. If a bit is set in the ESE and
the associated bit in the ESR changes from 0 to 1, the ESB bit in the STB is set. The
ESE register can be set using the command
*ESE
and read using the command
*ESE?
.
Status reporting system
