Phytec phyCORE-PXA255, Hardware Manual

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Memory Configuration
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PHYTEC Meßtechnik GmbH 2004 L-657e_0
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However it is important to be aware of the bus configuration on the
phyCORE module. When setting the bit FL_WP the Flash will be
write-protected with WP.
AC97ENA is an output that extends to the expansion socket of the
AC97 interface. This is provided so that the expansion circuitry
supply voltage can be turned off or switched to power down mode.
The connections have to be made on the AC97 expansion board.
Refer to section 12 for more details on this AC97 expansion
connector.
REG ADDR D7-D4 D3 D2 D1 D0
CTRL 9 0x0c000012 Res Res AC97 ENA /FL_DIS FL_WP
RW R/W=0 R/W=0 R/W R/W R/W
Table 15: PLD U6 Control Register 9
FL_WP Setting this bit disables writing the on-board Flash
on the phyCORE-PXA255.
/FL_DIS This bit can be used to disable the on-board Flash
on the phyCORE-PXA255. This bit is active low
AC97_ENA This bit controls an output signal routed to the
AC97 expansion connector. It can be used to turn
the supply voltage for an AC97 module connected
to X24 on or off.
Control register 10 of the PLD U6 ist not supported in the current
version of the Development Board. This register is reserved for future
use.
REG ADDR D7-D4 D3 D2 D1 D0
CTRL 10 0x0c000014 Res Res Res Res Res
RW R/W=0 R/W=0 R/W=0 R/W=0 R/W=0
Table 16: PLD U6 Control Register 10