Phytec phyCORE-PXA255, Hardware Manual

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GPIO Expansion

PHYTEC Meßtechnik GmbH 2004 L-657e_0
69
17 GPIO Expansion Board Interface
The Development Board also provides a socket for standardized
PHYTEC Expansion Boards. All signals except the data, address and
control bus of the phyCORE-PXA255 extend from phyCORE
connector X18 to the expansion connector X17 in a strict 1:1
arrangement. The data, address and control bus is buffered on the
Development Board over line driver circuits before being connected
to X17. The Ethernet signals do not extend to the expansion socket.
Similar to the numbering scheme of the phyCORE connector, the
expansion connector also uses a two-dimensional number matrix.
Because of its different layout, however, the arrangement of the
expansion connector’s number matrix differs from that of the
phyCORE connector.
Please refer to the following figure for the arrangement of the
number matrix for the expansion connector:
B
A
D
C
8 0
1
8 0
1
Figure 39: GPIO Expansion Bus Numbering Scheme
In the current version of the address decoder there is no memory area
provided for the expansion card receptacle, because all /CS signals of
the PSA255 are occupied. The following tables give the signal
assignments for the signals of the phyCORE connector X18 to the
expansion bus connector. Signals that are in bold are buffered on the
Development Board.