Pin
Description
©
PHYTEC Messtechnik GmbH 2010 L-750e_1
21
30B GND
- - Ground
0V
31B X_SD1_DATA1
I/O
VDD_3V3
SD/MMC Data line both in 1-bit and
4-bit mode
32B X_SD1_DATA3
I/O
VDD_3V3
SD/MMC Data line both in 1-bit and
4-bit mode
33B X_SD1_CMD
O
VDD_3V3 SD/MMC Command for
MMC/SD/SDIO
34B GND
- - Ground
0V
35B X_CSPI1_SS1
O
VDD_3V3
SPI 1 Chip select 1
36B X_CSPI1_MOSI
I/O
VDD_3V3
SPI 1 Master data out; slave data in
37B X_CSPI1_MISO
I/O
VDD_3V3
SPI 1 Master data in; slave data out
38B GND
- - Ground
0V
39B X_UART1_RXD
I VDD_3V3
Serial data receive signal UART 1
40B X_UART1_CTS
I VDD_3V3
Clear to send UART 1
41B GND
- - Ground
0V
42B X_SCK4
I VDD_3V3 AC97
Clock
43B X_STXFS4
O
VDD_3V3 AC97
SYNC
44B X_AC97_nRESET
O
VDD_3V3 AC97
Reset
45B GND
- - Ground
0V
46B X_SDIO_CD
I VDD_3V3 SD/MMC Card Detect for
MMC/SD/SDIO
47B GPIO2_23
I/O
VDD_3V3
GPIO1 (µC port GPIO2_23 at V3)
48B X_OWIRE
- VDD_3V3 Hardware
Introspection Interface
for internal use only
49B GND
- - Ground
0V
50B X_BOOT1
I VDD_3V3 Boot-Mode
Input
1
Table 3:
Pin-out of the phyCARD-Connector X2