The phyCARD-M on the phyBASE
©
PHYTEC Messtechnik GmbH 2010 L-750e_1
113
The Real-Time Clock is programmed via the I
2
C bus
(address 0xA2 / 0xA3). Since the phyCARD-M is equipped with an
internal I
2
C controller, the I
2
C protocol is processed very effectively
without extensive processor action (refer also to
section 9.5)
The Real-Time Clock also provides an interrupt output that extends to
the Wakeup signal at X27A48
15
. An interrupt occurs in the event of a
clock alarm, timer alarm, timer overflow and event counter alarm. It
has to be cleared by software. With the interrupt function, the
Real-Time Clock can be utilized in various applications.
If the RTC interrupt is to be used as software interrupt via a
corresponding interrupt input of the processor.
Note:
After connection of the supply voltage the Real-Time Clock
generates
no
interrupt. The RTC must be first initialized
(see RTC Data Sheet for more information).
Use of a coin cell at BAT1 allows to buffer the RTC.
17.3.18
PLD at U25
The phyBASE is equipped with a Lattice LC4256V PLD at U25. This
PLD device provides the following features:
•
Power management function (
section 17.3.2
)
•
Signal mapping for sound devices WM9712L and AD1986A
(
section 17.3.9
)
•
Configuration the sound device AD1986A for HDA or AC97
•
Signal mapping SPI chip select and interrupt to the expansion or
display connectors (
sections 17.3.11
and
17.3.12
)
•
Touch Signal mapping to WM9712L or STMP811 (
section
17.3.7.3
)
15
: connected to GPIO3_0 (at R4) of the i.MX35 on the phyCARD-M