Peritek
5-70
Programming On-board Devices and Memories
A two port memory, located in the UE, will store the image. In the case of
the VCD-V and VCU-V, DATA_00H - DATA_31H carry four bytes of
pixel data, where pixel 0, the leftmost pixel on the display, is carried on
DATA_00H - DATA_07H. DATA_00H is the LSB. In the VCT-V,
DATA_00H - DATA_31H carry one pixel. Four additional control signals
are defined (all low active): outputs: VSL, HSL, and REL; and input:
PRDYL.
Under control of the 34020, a line of data is written into graphics board
display memory at a position determined by software. Frames are
transferred at a rate determined by software but can be as often as 30 times
per second. A write-mask register protects any or all bits in the display
memory from being written during the transfer process. Experiment has
shown that data can be transferred at a sustainable rate of one 640 8-bit
pixel line in about 67 us. Thus, there is ample margin to satisfy the data
transfer requirements and still perform routine graphic functions. The
control lines use four spare control lines lines in DUART0. All bits are
read or write only. The lines are as follows:
Summary of Contents for VCD-V
Page 2: ...Peritek ...
Page 3: ...Peritek ...
Page 5: ...Peritek ...
Page 6: ...Peritek ...
Page 10: ...Peritek ...
Page 42: ...Peritek Installing Your Peritek Graphics Board 2 11 Figure 2 3 Jumper Locations for the VCD V ...
Page 94: ...Peritek Theory of Operation 4 15 Figure 4 1 VCD V Block Diagram ...
Page 95: ...Peritek 4 16 Theory of Operation Figure 4 2 VCU V Block Diagram ...
Page 96: ...Peritek Theory of Operation 4 17 Figure 4 3 VCT V Block Diagram ...
