Peritek VCD-V, User Manual

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Peritek
Programming On-board Devices and Memories 5-5
Table 5-2 CSR Bit Definitions
REVFLAG used by software to determine that this is a board with
PC Keyboard and byte swapper capability. On older
boards this bit was r/w. From VCT/VCU Rev 4 and
VCD Rev 2 it reads back set.
A24EN allows the 1K DBR address range to respond in A24
space. The CSR is still only addressable in A16 space.
CRTCON turns on the 34020. It must be set before the 34020 has
been loaded with its timing parameters (See Section
5.4). When CRTCON is reset, the 34020 internal
register set is held cleared.
MEMON allows the board to respond to the 1KB DBR (line
buffer) address range.
XMEMON allows the board to respond to the 32-bit address range.
A1624SWAPEN Enables byte swapping in the DBR A16 or A24 address
range. Note that when this bit is set, the DBR address
range expands to 4 KB (from 1 KB).
VINTEN allows the 34020 on the board to interrupt the VMEbus.
When entering the interrupt service routine, VINTEN
should be cleared. To avoid spurious interrupts, be sure
that the 34020's interrupt request flag has dropped
before reenabling VINTEN.
Interrupts are level sensitive, i.e. if VINTEN is enabled
after a device interrupt has been asserted, the VMEbus
will be interrupted immediately. The VMEbus interrupt
request goes away only if the VINTEN is cleared.
Device interrupts are latched if VINTEN is on.
A32SWAPEN Enables byte swapping in the 64 MB window's A32
address range.
Note that when this bit is set, the
address range expands to 256 MB (from 64 MB).
XARSEL selects the XAR register for access through the dual
function XAR/DBRADR address match registers (CSR
group, offset 8). See Section 5.2.4.