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Relion 1900e/2900e Manual

Revision 1.0

116

AC Input

Vout

PWOK

12Vsb

PSON

sb_on_delay

AC_on_delay

pwok_on

vout_holdup

pwok_holdup

pson_on_delay

sb_on_delay

pwok_on

pwok_off

pson_pwok

pwok_low

sb_vout

AC turn on/off cycle

PSON turn on/off cycle

5Vsb

_holdup

Figure 34. Turn On/Off Timing (Power Supply Signals)

Summary of Contents for Relion 1900e

Page 1: ...Relion 1900e Technical Guide Rev 1 0 PENGUIN COMPUTING www penguincomputing com 1 888 PENGUIN 736 4846 twitter PenguinHPC...

Page 2: ...Relion 1900e 2900e Manual Revision 1 3 April 2016 Intel Server Boards and Systems...

Page 3: ...Margin Sensor s Chapter 7 3 10 6 Updated content references to Inlet Temperature Sensor Chapter 7 3 14 5 Updated buffer DIMMs to DIMMs with teperature sensors Chapter 7 3 14 6 2 1 Updated content ref...

Page 4: ...NY CLAIM OF PRODUCT LIABILITY PERSONAL INJURY OR DEATH ARISING IN ANY WAY OUT OF SUCH MISSION CRITICAL APPLICATION WHETHER OR NOT PENGUIN COMPUTING OR ITS SUBCONTRACTOR WAS NEGLIGENT IN THE DESIGN MAN...

Page 5: ...t 15 3 3 Processor Population Rules 15 3 4 Processor Initialization Error Summary 16 3 5 Processor Function Overview 18 3 5 1 Processor Core Features 18 3 5 2 Supported Technologies 18 4 System Memory...

Page 6: ...8 1 Dual Video and Add In Video Adapters 46 5 8 2 Setting Video Configuration Options using the BIOS Setup Utility 48 5 9 USB Support 50 5 9 1 Low Profile eUSB SSD Support 50 5 10 Serial Ports 51 6 S...

Page 7: ...7 3 13 Fan Monitoring 70 7 3 14 Standard Fan Management 72 7 3 15 Power Management Bus PMBus 78 7 3 16 Power Supply Dynamic Redundancy Sensor 78 7 3 17 Component Fault LED Control 78 7 3 18 NMI Diagno...

Page 8: ...Connector 96 10 2 4 Front Panel USB 3 0 Connector 97 10 2 5 Front Panel Video Connector 97 10 2 6 Intel Local Control Panel Connector 97 10 3 On Board Storage Option Connectors 98 10 3 1 Single Port S...

Page 9: ...e Regulation 113 13 2 4 Dynamic Loading 113 13 2 5 Capacitive Loading 114 13 2 6 Grounding 114 13 2 7 Closed loop stability 114 13 2 8 Residual Voltage Immunity in Standby mode 114 13 2 9 Common Mode...

Page 10: ...ow Profile PCIe Riser card iPC A2UX8X4RISER Riser Slot 3 compatible only 37 Figure 17 Server Board Layout I O Module Connector 38 Figure 18 Server Board Layout Intel Integrated RAID Module Option Plac...

Page 11: ...Relion 1900e 2900e Manual x Revision 1 3 Figure 36 Relion 1900e 149 Figure 37 Relion 2900e 152...

Page 12: ...ty Security Configuration Screen Fields 57 Table 19 Server Board Power Control Sources 61 Table 20 ACPI Power States 61 Table 21 Processor Sensors 68 Table 22 Processor Status Sensor Implementation 68...

Page 13: ...stem Status LED State Definitions 109 Table 49 BMC Boot Reset Status LED Indicators 111 Table 50 Power Supply DC Power Output Connector Pinout 112 Table 51 Minimum Load Ratings 113 Table 52 Voltage Re...

Page 14: ...Relion 1900e 2900e Manual Revision 1 3 xiii This page is intentionally left blank...

Page 15: ......

Page 16: ...ader Overview Chapter 11 Reset and Recovery Jumpers Chapter 12 Light Guided Diagnostics Chapter 13 Power Supply Specification Guidelines Appendix A Integration and Usage Tips Appendix B Integrated BMC...

Page 17: ...866 MT s 2DPC and 2133 MT s 1DPC o DDR4 LRDIMM 1600 MT s 3DPC 2133 MT s 2DPC 1DPC DDR4 standard I O voltage of 1 2V Chipset Intel C612 chipset External Back Panel I O connections DB 15 Video connector...

Page 18: ...dule AXX1P40FRTIOM Single port QSFP 40 GbE module AXX2P40FRTIOM Dual port QSFP 40 GbE module System Fan Support Six system fans supported in two different connector formats hot swap 2U and cabled 1U o...

Page 19: ...1 0 4 2 1 Server Board Component Feature Identification The following illustration provides a general overview of the server board identifying key feature and component locations Figure 1 Server Board...

Page 20: ...l connectors to support the following features A RJ45 Networking Port NIC 1 B RJ45 Networking Port NIC 2 C Video D RJ45 Serial A Port E Stacked 3 port USB 2 0 3 0 F RJ45 Dedicated Management Port Figu...

Page 21: ...Relion 1900e 2900e Manual Revision 1 0 6 Figure 4 Intel Light Guided Diagnostic LED Identification Note See Appendix D for POST Code Diagnostic LED decoder information...

Page 22: ...Relion 1900e 2900e Manual 7 Revision 1 3 Figure 5 Jumper Block Identification See Chapter 11 Reset Recovery Jumpers for additional details...

Page 23: ...B s PCIe 3 0 x16 32 PCIe 3 0 x8 16 GB s PCIe 3 0 x8 16GB s Riser Slot 1 Riser Slot 2 Intel Ethernet Controller I350 or X540 Dual Port 1 GbE or 10 GbE PCIe 2 0 x8 10 GB s Intel C612 Series Chipset Inte...

Page 24: ...uEFI Shell using the uEFI only System Update Package SUP or under different operating systems using the Intel One Boot Flash Update Utility OFU 2 3 1 System BIOS The system BIOS is implemented as firm...

Page 25: ...ges which do not necessarily cause incompatibilities but do display differences in behavior or in support of specific functions for the board RelNum Release Number four decimal digits which are change...

Page 26: ...ogo Screen is present in the designated Flash Memory location the OEM Logo Screen will be displayed overriding the default Intel Logo Screen If a logo is not present in the BIOS Flash Memory space or...

Page 27: ...lity in the uEFI shell or can be done using the OFU utility program under a supported operating system 2 3 1 7 BIOS Recovery If a system is completely unable to boot successfully to an OS hangs during...

Page 28: ...manageability subsystem after changes have been made to the system s hardware configuration Once the system integrator has performed an initial SDR CFG package update subsequent auto configuration oc...

Page 29: ...evious generation Intel Xeon processors are not supported on the Intel server boards described in this document 3 1 Processor Socket Assembly Each processor socket of the server board is pre assembled...

Page 30: ...ng of different processors that meet the defined criteria below however Penguin Computing does not perform validation testing of this configuration In addition Intel does not guarantee that a server s...

Page 31: ...Error Pause is Enabled and a Major error is detected the system will go directly to the Error Manager screen in BIOS Setup to display the error and logs the POST Error Code to SEL Operator interventi...

Page 32: ...ble to synchronize message in the Error Manager Takes Fatal Error action see above and will not boot until the fault condition is remedied Processor Intel QuickPath Interconnect link frequencies not i...

Page 33: ...ovide an overview of the key processor features and functions that help to define the architecture performance and supported functionality of the server board Available features may vary between diffe...

Page 34: ...n memory by where application code can execute and where it cannot When malicious code attempts to insert code in the buffer the processor disables code execution preventing damage and further propaga...

Page 35: ...purpose software 3 5 2 10 Intel Node Manager 3 0 Intel Node Manager 3 0 enables the PTAS CUPS Power Thermal Aware Scheduling Compute Usage Per Second feature of the Intel Server Platform Services 3 0...

Page 36: ...DIMMs composed of 4 Gb or 8 Gb Dynamic Random Access Memory DRAM technology DIMMs using x4 or x8 DRAM technology DIMMs organized as Single Rank SR Dual Rank DR or Quad Rank QR DIMM sizes of 4 GB 8 GB...

Page 37: ...respond to an error in either one of the channels in a domain Lockstep refers to splitting cache lines across channels The same address is used on both channels such that an address error on any chan...

Page 38: ...pt Data Containment Corrupt Data Containment is a process of signaling memory patrol scrub uncorrected data errors synchronous to the transaction which enhances the containment of the fault and improv...

Page 39: ...n Channel E on processor 2 The memory slots associated with a given processor are unavailable if the corresponding processor socket is not populated A processor may be installed without populating the...

Page 40: ...rated on die thermal sensors TROD are supported DIMM slots on any memory channel must be filled following the farthest fill first rule The DIMM slot farthest away from the processor socket must be fil...

Page 41: ...els that are populated with memory meet the requirement of having at least 2 SR or DR DIMM installed or at least one QR DIMM installed on each populated channel Lockstep or Mirroring Modes require tha...

Page 42: ...stalled When NUMA support is enabled interleaving is intra socket only and the SRAT and SLIT ACPI tables are provided that show the locality of systems resources especially memory which allows a NUMA...

Page 43: ...t situations in which the memory size and or configuration are displayed Most of these displays differ in one way or another so the same memory configuration may appear to display differently dependin...

Page 44: ...lt 0xE9 DIMM SPD does not respond The DIMM will not be detected which could result in a No usable memory installed Fatal Error Halt 0xE8 if there are no other detectable DIMMs in the system The undete...

Page 45: ...basis if possible No usable memory installed If no enabled and available memory remains in the system this will result in a Fatal Error Halt 0xE8 4 8 3 Channel Training The Integrated Memory Controll...

Page 46: ...a bits and the ECC bits are in agreement 4 8 3 3 RAS Mode Initialization If configured the DIMM configuration is validated for the specified RAS mode If the enabled DIMM configuration is compliant for...

Page 47: ...odule provides the following PCIe Features Compliant with the PCI express Base Specification Revision 2 0 and Revision 3 0 2 5 GHz Gen1 and 5 GHz Gen2 and 8 GHz Gen3 x16 PCI Express 3 0 interface supp...

Page 48: ...varying presence of PCI devices with PCI PCI bridges If a bridge device with a single bus behind it is inserted into a PCI bus all subsequent PCI bus numbers below the current bus are increased by on...

Page 49: ...t system making this a fully symmetric configuration NTB Port to Root Port Based Connection Non Symmetric Configuration The root port on the first system is connected to the NTB port of the second sys...

Page 50: ...rds installed in Riser Slot 1 Table 9 Riser Card 1 PCIe Root Port Mapping Table 10 Riser Card 2 PCIe Root Port Mapping Riser Slot 2 Riser Card Options 2U 3 Slot Riser Card iPN A2UL8RISER2 2U 2 Slot Ri...

Page 51: ...riser card iPC F1UL16RISER2 Each riser card assembly has support for a single full height length PCIe add in card However riser card 2 may be limited to length height add in cards if either of the tw...

Page 52: ...op slot and one full height length add in card bottom slot Riser Slot 3 is provided to support up to two additional PCIe add in card slots for 2U server configurations The available riser card option...

Page 53: ...he IIO module of the CPU 1 processor Figure 17 Server Board Layout I O Module Connector Supported I O modules include Table 12 Supported Intel I O Module Options Description Intel Product Code iPC Qua...

Page 54: ...upport for Intel Integrated RAID modules These optional modules attach to a high density 80 pin connector labeled SAS Module on the server board and are supported by x8 PCIe 3 0 signals from the IIO m...

Page 55: ...ard The AHCI sSATA controller provides support for up to four SATA ports on the server board Four SATA ports from the Mini SAS HD SFF 8643 connector labeled sSATA Ports 0 3 on the server board The fol...

Page 56: ...er commands for more efficient data transfers N A Supported Auto Activate for DMA Collapses a DMA Setup then DMA Activate sequence into a DMA Setup only N A Supported Hot Plug Support Allows for devic...

Page 57: ...re available to enable disable SW RAID and select which embedded software RAID option to use Note RAID partitions created using either RSTe or ESRT2 cannot span across the two embedded SATA controller...

Page 58: ...lumes to the System BIOS for selection in the boot order At each boot up provides the user with a status of the RAID volumes 5 6 2 Intel Embedded Server RAID Technology 2 ESRT2 1 41 Features of ESRT2...

Page 59: ...SATA controllers 5 7 Network Interface On the back edge of the server board are three RJ45 networking ports NIC 1 NIC 2 and a Dedicated Management Port Figure 21 Network Interface Connectors Each eth...

Page 60: ...el 0 MAC address Base 2 BMC LAN channel 1 MAC address Base 3 Dedicated On board Management Port MAC address Base 4 The following MAC address assignments are used for FCoE support on server boards with...

Page 61: ...oard Video is Enabled and Add in Video Adapter is also Enabled then both video displays can be active The onboard video is still the primary console and active during BIOS POST the add in video adapte...

Page 62: ...Disabled grayout can t change When there is one add in video card connected to CPU Socket 1 Case 2 Onboard video active display add in video doesn t display Onboard Video Enabled Legacy VGA Socket CPU...

Page 63: ...n t change Legacy VGA Socket CPU Socket 2 Add in Video Adapte Enabled grayout can t change 5 8 2 Setting Video Configuration Options using the BIOS Setup Utility PCI Configuration Memory Mapped I O ab...

Page 64: ...Socket 2 this option is grayed out and unavailable with a value set to Disabled This is because the Onboard Video is connected to CPU Socket 1 and is not functional when CPU Socket 2 is the active pat...

Page 65: ...bled to a front panel 5 9 1 Low Profile eUSB SSD Support The server board provides support for a low profile eUSB SSD storage device A 2mm 2x5 pin connector labeled eUSB SSD near the rear I O section...

Page 66: ...GB Support USB Mass Storage Class requirements for Boot capability 5 10 Serial Ports The server board has support for two serial ports Serial A and Serial B Serial A is an external RJ45 type connecto...

Page 67: ...mper block labeled J4A4 located behind the connector from pins 1 2 default to pins 2 3 Serial A configuration jumper block J4A4 setting Serial B is an internal 10 pin DH 10 connector labeled Serial_B...

Page 68: ...BcDeFgH Power On Password Enabled Disabled Front Panel Lockout Enabled Disabled TPM State Displays current TPM Device State TPM Administrative Control No Operation Turn On Turn Off Clear Ownership 6 1...

Page 69: ...administrator that a password access failure has occurred Note When BIOS admin password is set and user is updating the BIOS with a customized by the ITK tool the command requires to append password...

Page 70: ...has encryption and hash functions The server board implements TPM as per TPM PC Client specifications revision 1 2 and 2 0 by the Trusted Computing Group TCG A TPM device is secured from external sof...

Page 71: ...tive request through the operating system s security software 2 The operating system requests the BIOS to execute the TPM administrative command through TPM ACPI methods and then resets the system 3 T...

Page 72: ...3 Intel Trusted Execution Technology The Intel Xeon Processor E5 4600 2600 2400 1600 v3 v4 Product Families support Intel Trusted Execution Technology Intel TXT which is a robust security environment...

Page 73: ...and design level platform management information 7 1 Management Feature Set Overview The following sections outline features that the integrated BMC firmware can support Support and utilization for s...

Page 74: ...al states The BMC generates diagnostic beep codes for fault conditions System GUID storage and retrieval Front panel management The BMC controls the system status LED and chassis ID LED It supports se...

Page 75: ...rtial SMBIOS table DCMI 1 5 compliance Management support for PMBus rev 1 2 compliant power supplies BMC Data Repository Managed Data Region Feature Support for an Intel Local Control Display Panel Sy...

Page 76: ...face ACPI The server board has support for the following ACPI states Table 20 ACPI Power States State Supported Description S0 Yes Working The front panel power LED is on not controlled by the BMC The...

Page 77: ...attempt is written FRB2 failure is not reflected in the processor status sensor value The FRB2 failure does not affect the front panel LEDs 7 2 3 3 Post Code Display The BMC upon receiving standby pow...

Page 78: ...ffect would be boosting fans due to an upper critical threshold crossing of a temperature sensor The event state and the input state value of the sensor track each other Most sensors are auto rearm A...

Page 79: ...t or the BMC CPU itself is reset 7 3 7 BMC System Management Health Monitoring The BMC tracks the health of each of its IPMI sensors and report failures by providing a BMC FW Health sensor of the IPMI...

Page 80: ...o some reference value Thermal fault indication sensors These are discrete sensors that indicate a specific thermal fault condition 7 3 10 2 Processor DTS Spec Margin Sensor s Intel Server Systems sup...

Page 81: ...l thermally constrained time which are used to calculate the percentage assertion over the given time window 7 3 10 5 Processor Voltage Regulator VRD Over Temperature Sensor The BMC monitors processor...

Page 82: ...inputs in order to throttle the associated memory to effectively lower the temperature of the VRD feeding that memory For Intel Server Systems supporting the Intel Xeon processor E5 2600 v3 v4 product...

Page 83: ...erted it remains asserted until one of the following happens 1 A Rearm Sensor Events command is executed for the processor status sensor 2 AC or DC power cycle system reset or system boot occurs The B...

Page 84: ...to disable or enable system reset by the BMC for detection of this condition 7 3 11 4 CATERR Sensor The BMC supports a CATERR sensor for monitoring the system CATERR signal The CATERR signal is defin...

Page 85: ...the main board and processors such that all major areas of the system are covered This monitoring capability is instantiated in the form of IPMI analog threshold sensors 7 3 12 1 Discrete Voltage Sens...

Page 86: ...cy is configuration dependent The BMC allows redundancy to be configured on a per fan redundancy sensor basis through OEM SDR records There is a fan redundancy sensor implemented for each redundant gr...

Page 87: ...d into fan domains each of which has a separate fan speed control signal and a separate configurable fan control policy A fan domain can have a set of temperature and fan sensors associated with it Th...

Page 88: ...mber of redundant fans is a non fatal insufficient resources condition and is reflected in the front panel status as a non fatal error Redundancy is checked only when the system is in the DC on state...

Page 89: ...capability requires the BMC to access temperature sensors on the individual memory DIMMs Additionally closed loop thermal throttling is only supported with DIMMs with temperature sensors 7 3 14 6 Ther...

Page 90: ...al Management The system memory is the most complex subsystem to thermally manage as it requires substantial interactions between the BMC BIOS and the embedded memory controller HW This section provid...

Page 91: ...gorithm is used for controlling fan speed based on DIMM temperatures Aggregate DIMM temperature margin sensors are used as the control input to the algorithm 7 3 14 6 4 Dynamic Hybrid CLTT The system...

Page 92: ...apped just as for chassis system fans with system thermal sensors rather than internal power supply thermal sensors used as the input to a clamp algorithm for the power supply fan control This domain...

Page 93: ...rom reporting Fully Redundant Power supplies when the load required by the system exceeds half the power capability of all power supplies installed and operational Dynamic Redundancy detects this cond...

Page 94: ...the LEDs reflect CPU Fault LEDs The BMC owns control for these LEDs An LED is lit if there is an MSID mismatch that is CPU power rating is incompatible with the board 7 3 18 NMI Diagnostic Interrupt S...

Page 95: ...eal Time Clock This is monitored as an auto rearm threshold sensor Unlike monitoring of other voltage sources for which the Emulex Pilot III component continuously cycles through each input the voltag...

Page 96: ...2 0 NPTM is an evolving technology that is expected to continue to add new capabilities that will be defined in subsequent versions of the specification The ME NM implements the NPTM policy engine and...

Page 97: ...s compliant power supply detects insufficient input voltage an overcurrent condition or an over temperature condition it will assert the SMBAlert signal on the power supply SMBus such as the PMBus Thr...

Page 98: ...sion 1 3 8 6 1 Dependencies on PMBus compliant Power Supply Support The SmaRT CLST system feature depends on functionality present in the ME NM SKU This feature requires power supplies that are compli...

Page 99: ...l RMM4 Lite If the attempt to access the Intel RMM4 Lite is successful then the BMC activates the advanced features The following table identifies both Basic and Advanced server management features Ta...

Page 100: ...connectivity to the BMC as well as an optional dedicated add in management NIC At least two concurrent web sessions from up to two different users is supported The embedded web user interface shall su...

Page 101: ...Power supply related Automatic refresh of sensor data with a configurable refresh rate Online help Display clear SEL display is in easily understandable human readable format Support major industry st...

Page 102: ...e server Once mounted the remote device appears just like a local device to the server allowing system administrators or users to install software including operating systems copy files update BIOS or...

Page 103: ...n forms displayed by the browser The Remote Console window is a Java Applet that establishes TCP connections to the BMC The protocol that is run over these connections is a unique KVM protocol and not...

Page 104: ...The media redirection feature is intended to allow system administrators or users to mount a remote IDE or USB CD ROM floppy drive or a USB flash disk as a remote device to the server Once mounted th...

Page 105: ...S installation If either a virtual IDE or virtual floppy device is remotely attached during system boot both the virtual IDE and virtual floppy are presented as bootable devices It is not possible to...

Page 106: ...supplies with cable harnesses In a redundant power supply configuration a failed power supply module is hot swappable The following tables provide the pin out for both MAIN PWR 1 and MAIN PWR 2 conne...

Page 107: ..._DATA_R P3V3_AUX PD_PS2_FRU_A1 B20 A20 SMB_PMBUS_CLK_R P12V_STBY B21 A21 FM_PS_EN_PSU_N FM_PS_CR1 B22 A22 IRQ_SML1_PMBUS_ALERTR3_N P12V_SHARE B23 A23 ISENSE_P12V_SENSE_RTN TP_2_B24 B24 A24 ISENSE_P12V...

Page 108: ...dd in cards Video GPGPU Intel Xeon Phi that have power requirements that exceed the 75W maximum power supplied by the riser card slot A cable from this connector may be routed to a power connector on...

Page 109: ...SSI Front Panel Storage Front Panel Power Sleep Button Yes Yes System ID Button Yes Yes System Reset Button Yes Yes NMI Button Yes Yes NIC Activity LED Yes Yes Storage Device Activity LED Yes Yes Syst...

Page 110: ...PMI Chassis Identify command which will cause the LED to blink for 15 seconds 10 2 2 3 System Reset Button Support When pressed this button will reboot and re initialize the system 10 2 2 4 NMI Button...

Page 111: ...iving access to this LED for add in controllers 10 2 2 7 System Status LED Support The System Status LED is a bi color Green Amber indicator that shows the current health of the server system The syst...

Page 112: ...Front Panel Video Connector The server board includes a 14 pin header that when cabled can provide an alternate video connector to the front panel On the server board this connector is labeled FP_VID...

Page 113: ...Only Connectors The server board includes two white single port SATA only connectors capable of transfer rates of up to 6Gb s On the server board these connectors are labeled as SATA 4 and SATA 5 The...

Page 114: ...ternal Type A USB Connector Pin out USB 2 0 Signal Description Pin P5V_USB_INT 1 USB2_P2_F_DN 2 USB2_P2_F_DP 3 GROUND 4 10 3 3 Internal 2mm Low Profile eUSB SSD Connector The server board includes one...

Page 115: ...Description Pin Pin Signal Description LED_FAN 10 GROUND 1 2 P12V FAN LED_FAN_FAULT 9 FAN TACH 3 4 FAN PWM SYS FAN PRSNT 8 SYS FAN PRSNT 5 6 LED FAN FAULT GROUND 7 GROUND 6 FAN_TACH_ 5 P12V_FAN 4 P12V...

Page 116: ...st state The BMC hardware cannot differentiate between a missing chassis intrusion cable or connector and a true security violation If the chassis intrusion cable or connector is removed or damaged th...

Page 117: ...hot swap backplane allowing for firmware updates and other platform management functions These connectors have the following pin out Table 46 Hot Swap Backplane I2C Connector Pin out Signal Descriptio...

Page 118: ...ote This jumper does not reset Administrator or User passwords In order to reset passwords the Password Clear jumper must be used 1 Power down the server and unplug the power cord s 2 Remove the syste...

Page 119: ...rors should be logged 5221 Passwords cleared by jumper 5224 Password clear jumper is set 7 Exit the BIOS Setup utility and power down the server For safety remove the AC power cords 8 Remove the syste...

Page 120: ...move the AC power cords Note If the BMC FRC UPD jumper is moved with AC power applied to the system the BMC will not operate properly 3 Remove the system top cover 4 Move the BMC FRC UPD Jumper from p...

Page 121: ...For safety remove the AC power cords 3 Remove the system top cover 4 Move the BIOS Recovery jumper from pins 1 2 default to pins 2 3 BIOS Recovery position 5 Re install the system top cover and re att...

Page 122: ...1 3 12 Light Guided Diagnostics The server board includes several on board LED indicators to aid troubleshooting various board level faults The following diagram shows the location for each LED Figur...

Page 123: ...m front panel if present 12 2 System Status LED The server board includes a bi color System Status LED The System Status LED on the server board is tied directly to the System Status LED on the front...

Page 124: ...Fan warning or failure when the number of fully operational fans is less than minimum number needed to cool the system Non critical threshold crossed Temperature including HSBP temp voltage input pow...

Page 125: ...Critical non recoverable System is halted Fatal alarm system has failed or shutdown CPU CATERR signal asserted MSID mismatch detected CATERR also asserts for this case CPU 1 is missing CPU Thermal Tri...

Page 126: ...operate as per usual 12 4 Post Code Diagnostic LEDs A bank of eight POST code diagnostic LEDs are located on the back edge of the server next to the stacked USB connectors During the system boot proc...

Page 127: ...ncludes two main power slot connectors allowing for power supplies to attach directly to the server board Power supplies must utilize a card edge output connection for power and signal that is compati...

Page 128: ...d There should be load sharing in the standby rail Two PSU modules should be able to support 4A standby current 13 2 3 Voltage Regulation The power supply output voltages must stay within the followin...

Page 129: ...mponents with this voltage applied to any individual or all outputs simultaneously It also should not trip the protection circuits during turn on The residual voltage at the power supply outputs for n...

Page 130: ...the timing requirements for the power supply being turned on and off from the AC input with PSON held low and the PSON signal with the AC input applied Table 56 Timing Requirements Item Description MI...

Page 131: ...Vsb PSON Tsb_on_delay TAC_on_delay Tpwok_on Tvout_holdup Tpwok_holdup Tpson_on_delay Tsb_on_delay Tpwok_on Tpwok_off Tpwok_off Tpson_pwok Tpwok_low Tsb_vout AC turn on off cycle PSON turn on off cycle...

Page 132: ...cessor configurations The riser card slots are specifically designed to support riser cards only Attempting to install a PCIe add in card directly into a riser card slot on the server board may damage...

Page 133: ...holds for threshold types of sensors u l nr c nc upper non recoverable upper critical upper non critical lower non recoverable lower critical lower non critical uc lc upper critical lower critical Eve...

Page 134: ...scribe a sensor A Auto rearm M Manual rearm Default Hysteresis The hysteresis setting applies to all thresholds of the sensor This column provides the count of hysteresis for the sensor which can be 1...

Page 135: ...Fh 00 Power down OK As and De Trig Offset A X 02 240 VA power down Fatal 04 A C lost OK 05 Soft power control failure Fatal 06 Power unit failure Power Unit Redundancy Pwr Unit Redund 02h Chassis spec...

Page 136: ...SMI Timeout F3h Digital Discrete 03h 01 State asserted Fatal As and De Trig Offset A System Event Log System Event Log 07h All Event Logging Disabled 10h Sensor Specific 6Fh 02 Log area reset cleared...

Page 137: ...Thermal Trip SSB Therm Trip 0Dh All Temperature 01h Digital Discrete 03h 01 State Asserted Fatal As and De Trig Offset M X IO Module Presence IO Mod Presence 0Eh Platform specific Module Board 15h Dig...

Page 138: ...log R T A X PCI Riser 3 Temperature PCI Riser 3 Temp 17h Platform specific Temperature 01h Threshold 01h u l c nc nc Degraded c Non fatal As and De Analog R T A X PCI Riser 4 Temperature PCI Riser 4 T...

Page 139: ...PCI Riser 1 Temperature PCI Riser 1 Temp 27h Platform specific Temperature 01h Threshold 01h u l c nc nc Degraded c Non fatal As and De Analog R T A X IO Riser Temperature IO Riser Temp 28h Platform...

Page 140: ...alNote3 As and De Analog R T M Fan Present Sensors Fan x Present 40h 4Fh Chassis and Platform Specific Fan 04h Generic 08h 01 Device inserted OK As and De Triggered Offset Auto Power Supply 1 Status P...

Page 141: ...Hard Disk Drive 15 23 Status HDD 15 23 Status 60h 68h Chassis specific Drive Slot 0Dh Sensor Specific 6Fh 00 Drive Presence OK As and De Trig Offset A X X 01 Drive Fault Degraded 07 Rebuild Remap in...

Page 142: ...De Analog Trig Offset A Processor 4 Thermal Control P4 Therm Ctrl 7Bh Platform specific Temperature 01h Threshold 01h u c nc nc Degraded c Non fatal As and De Analog Trig Offset A Processor ERR2 Timeo...

Page 143: ...an Tachometer 1 PS1 Fan Tach 1 A0h Chassis specific Fan 04h Generic digital discrete 03h 01 State Asserted Non fatal As and De Trig Offset A Power Supply 1 Fan Tachometer 2 PS1 Fan Tach 2 A1h Chassis...

Page 144: ...e 01h Threshold 01h u c nc nc Degraded c Non fatal As and De Analog R T A Processor 3 DIMM Aggregate Thermal Margin 1 P3 DIMM Thrm Mrgn1 B4h Platform Specific Temperature 01h Threshold 01h u c nc nc D...

Page 145: ...p P4 Mem Thrm Trip C3h Platform Specific Memory 0Ch Sensor Specific 6Fh 0A Critical overtemperature Fatal As and De Trig Offset M X MIC 1 Temp GPGPU1 Core Temp C4h Platform Specific Temperature 01h Th...

Page 146: ...n 7 Agg Therm Mrgn 7 CEh Platform Specific Temperature 01h Threshold 01h Analog R T A Global Aggregate Temperature Margin 8 Agg Therm Mrgn 8 CFh Platform Specific Temperature 01h Threshold 01h Analog...

Page 147: ...Event Data 2 0 Forced GPIO recovery Recovery Image loaded due to MGPIO n default recovery pin is MGPIO1 pin asserted Repair action Deassert MGPIO1 and reset the ME 1 Image execution failed Recovery Im...

Page 148: ...h Event Type 02h Sensor Node Manager 4 5 10b OEM code in byte 3 6 7 10b OEM code in byte 2 Byte 6 Event Data 2 0 3 Domain Id Currently supports only one domain Domain 0 4 7 Error type 0 9 Reserved 10...

Page 149: ...de number is displayed to the POST Code Diagnostic LEDs on the back edge of the server board During a POST system hang the displayed post code can be used to identify the last POST routine that was ru...

Page 150: ...tialization of applicable RAS configurations The MRC Progress Codes are displayed to the Diagnostic LEDs that show the execution point in the MRC operational path at each step Table 61 MRC Progress Co...

Page 151: ...E8h 1 1 1 0 1 0 0 0 No usable memory error 01h No memory was detected from SPD read or invalid config that causes no operable memory 02h Memory DIMMs on all channels of all sockets are disabled due to...

Page 152: ...ual 137 Revision 1 3 Checkpoint Diagnostic LED Decoder Description 1 LED On 0 LED Off Upper Nibble Lower Nibble MSB LSB 8h 4h 2h 1h 8h 4h 2h 1h LED 7 6 5 4 3 2 1 0 EFh 1 1 1 0 1 1 1 1 Indicates a CLTT...

Page 153: ...1 0 0 1 End Of SEC Phase 0Eh 0 0 0 0 1 1 1 0 Microcode Not Found 0Fh 0 0 0 0 1 1 1 1 Microcode Not Loaded PEI Phase 10h 0 0 0 1 0 0 0 0 PEI Core 11h 0 0 0 1 0 0 0 1 CPU PEIM 15h 0 0 0 1 0 1 0 1 NB PE...

Page 154: ...Ch 1 0 0 1 1 1 0 0 DXE USB detect 9Dh 1 0 0 1 1 1 0 1 DXE USB enable A1h 1 0 1 0 0 0 0 1 DXE IDE begin A2h 1 0 1 0 0 0 1 0 DXE IDE reset A3h 1 0 1 0 0 0 1 1 DXE IDE detect A4h 1 0 1 0 0 1 0 0 DXE IDE...

Page 155: ...1 1 1 0 0 0 0 1 S3 Resume PEIM S3 boot script E2h 1 1 1 0 0 0 1 0 S3 Resume PEIM S3 Video Repost E3h 1 1 1 0 0 0 1 1 S3 Resume PEIM S3 OS wake BIOS Recovery F0h 1 1 1 1 0 0 0 0 PEIM which detected fo...

Page 156: ...he POST Error Pause option setting in the BIOS setup determines whether the system pauses to the Error Manager for this type of error so the user can take immediate corrective action or the system con...

Page 157: ...controller failed to respond Major 84F3 Baseboard management controller in update mode Major 84F4 Sensor data record empty Major 84FF System event log full Minor 8500 Memory component could not be co...

Page 158: ...DIMM_A2 disabled Major 8542 DIMM_A3 disabled Major 8543 DIMM_B1 disabled Major 8544 DIMM_B2 disabled Major 8545 DIMM_B3 disabled Major 8546 DIMM_C1 disabled Major 8547 DIMM_C2 disabled Major 8548 DIMM...

Page 159: ...a Serial Presence Detection SPD failure Major 8573 DIMM_G2 encountered a Serial Presence Detection SPD failure Major 8574 DIMM_G3 encountered a Serial Presence Detection SPD failure Major 8575 DIMM_H...

Page 160: ...failure Major 85E6 DIMM_N3 encountered a Serial Presence Detection SPD failure Major 85E7 DIMM_P1 encountered a Serial Presence Detection SPD failure Major 85E8 DIMM_P2 encountered a Serial Presence D...

Page 161: ...A Recovery boot has been initiated 4 Recovery failed N A Recovery has failed This typically happens so quickly after recovery is initiated that it sounds like a 2 4 beep code The Integrated BMC may ge...

Page 162: ...volatile Non volatile memory is persistent and is not cleared when power is removed from the system Non Volatile memory must be erased to clear data The exact method of clearing these areas varies by...

Page 163: ...ssword is stored in BIOS flash and is only used to set BIOS configuration access restrictions BMC The server boards support an Intelligent Platform Management Interface IPMI 2 0 conformant baseboard m...

Page 164: ...ard Options Relion 1900e w Dual 1GbE ports S2600WT2R Relion 1900e w Dual 10GbE ports S2600WTTR Processor Support Two LGA2011 3 Socket R3 processor sockets Support for one or two Intel Xeon processors...

Page 165: ...d port RJ45 1 GbE based on Intel Ethernet Controller I350 TBD Dual port RJ 45 10GBase T I O Module based on Intel Ethernet Controller x540 AXX10GBNIAIOM Dual port SFP 10 GbE module based on Intel 8259...

Page 166: ...hree power supply options AC 750W Platinum DC 750W Gold AC 1100W Platinum Storage Options 12Gb sec Hot Swap Backplane Options 8x 2 5 SATA SAS 4x 2 5 SATA SAS 4x 2 5 PCIe NVM Express Not Hot Swappable...

Page 167: ...Support Two LGA2011 3 Socket R3 processor sockets Support for one or two Intel Xeon processors E5 2600 v3 v4 product family Maximum supported Thermal Design Power TDP of up to 145 W Memory 24 DIMM slo...

Page 168: ...udes a proprietary on board connector allowing for the installation of a variety of available I O modules An installed I O module can be supported in addition to standard on board features and add in...

Page 169: ...onfigurations 1 0 1 1 Redundant Power and 2 0 Combined Power Three power supply options AC 750W Platinum DC 750W Gold AC 1100W Platinum Storage Options 12Gb sec Hot Swap Backplane Options 8 x 2 5 SATA...

Page 170: ...dge Controller A microcontroller connected to one or more other CBCs together they bridge the IPMB buses of multiple chassis CEK Common Enabling Kit CHAP Challenge Handshake Authentication Protocol CM...

Page 171: ...D Liquid Crystal Display LDAP Local Directory Authentication Protocol LED Light Emitting Diode LPC Low Pin Count LUN Logical Unit Number MAC Media Access Control MB 1024 KB MCH Memory Controller Hub M...

Page 172: ...ble Read Only Memory SEL System Event Log SIO Server Input Output SMBUS System Management BUS SMI Server Management Interrupt SMI is the highest priority non maskable interrupt SMM Server Management M...

Page 173: ...rver System BIOS Setup Utility Guide for Intel Servers Systems supporting the Intel Xeon processor E5 2600 V3 v4 product family Intel Server System BMC Firmware External Product Specification for Inte...

Page 174: ...__________________________________________________________________________ __________________________________________________________________________________________________ __________________________...

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