195
UF-5500 / 4500
MAC through the MII. TXD[3..0] has no effect when TXEN is de-asserted.
• RMII Tx Mode: The TXD[1:0] bits are synchronous with REF_CLK. For each clock period in which TX_EN is asserted, two bits of
data are received by the PHY from the MAC.
11.2.20. Main Board Section
3.3V / 1.2V Troubleshooting Guide (1)
OK
OK
NG
NG
Is the input voltage
24V pin8 of CN504 on the
MAIN Board correct?
Are the resistance
value of 24V more
than50
ǡ
?
Check C807, C808, C501, C503,
C505, C524, C525, IC502, IC700,
Q509, Q523 on the main board and
replace the parts having the problem.
OK
Is the problem
still occurred?
Check PSU and Harness between
CN504 and PSU and replace the
parts having the problem.
Replace the
MAIN Board.
END
NG
OK
OK
OK
Is the problem
still occurred?
Replace the
MAIN Board.
Replace IC800 on
the MAIN Board.
END
END
3.3V / 1.2V Troubleshooting(2)
NG
OK
(1.2V NG)
(3.3V NG)
(1.2V & 3.3V NG)
OK
NG
NG
NG
Is the 3.3V output
voltage correct?
Is the problem
still occurred?
Is the 1.2V output
voltage correct?
3.3 V / 1.2 V Troubleshooting(1)
Summary of Contents for UF-4500
Page 180: ...180 UF 5500 4500 ...
Page 248: ...248 UF 5500 4500 13 5 Test Chart 13 5 1 ITU T No 1 Test Chart ...
Page 249: ...249 UF 5500 4500 13 5 2 ITU T No 2 Test Chart ...
Page 281: ...281 UF 5500 4500 10 10 11 15 12 17 18 19 20 21 22 23 24 28 29 30 27 25 26 21 13 14 16 30 ...
Page 287: ...287 UF 5500 4500 130 131 132 133 134 135 136 137 138 139 140 141 PCB2 A UF 5500 only CN1 ...
Page 297: ...297 UF 5500 4500 ...
Page 305: ...305 UF 5500 4500 ...
Page 311: ...311 UF 5500 4500 501 502 503 504 506 507 505 508 509 511 510 514 513 512 P51 P53 P54 A51 P52 ...
Page 362: ...362 UF 5500 4500 ...