■
Precautions during programming
● The high-speed counter control active flag turns ON until the value matches the target value
after the execution condition of the instruction has turned ON. During this processing, the
high-speed counter instruction F165 (CAM0) / F166 (HC1S) / F167 (HC1R) cannot be
executed for the high-speed counter of the same channel.
● When the hardware reset is performed before the elapsed value matches the target value,
the elapsed value will be reset. However, the settings of the target value and the target value
match output will not be cleared.
● For the output Y specified for the target value match output, it is not checked whether the
output is overlapped with the OT, KP and other high-level instructions.
● When describing the same channel in both the normal program and the interrupt program, be
sure to program not to execute them simultaneously.
● For details of the allocations of I/O and flags, refer to “Allocation of Memory Areas”.
REFERENCE
11.2.4 When Using High-speed Counter Function
10.3.4 Sample Program (Positioning Operation With Inverter: Single-Speed)
Counts the feedback signals from the encoder with the high-speed counter. The operation of
the inverter stops when the count value reaches 5000.
10.3 High-speed Counter Instruction
WUME-FPXHPOSG-01
10-15
Summary of Contents for FP-XH Series
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