
Glossary
123
response format
A format specifying the data required in a response to a data transmission.
response monitoring time
The time a device will wait for a response to a data transmission before assum-
ing that an error has occurred.
Restart Bit
A bit used to restart part of a PC.
result word
A word used to hold the results from the execution of an instruction.
retrieve
The processes of copying data either from an external device or from a storage
area to an active portion of the system such as a display buffer. Also, an output
device connected to the PC is called a load.
retry
The process whereby a device will re-transmit data which has resulted in an
error message from the receiving device.
return
The process by which instruction execution shifts from a subroutine back to the
main program (usually the point from which the subroutine was called).
reversible counter
A counter that can be both incremented and decremented depending on the
specified conditions.
reversible shift register
A shift register that can shift data in either direction depending on the specified
conditions.
right-hand instruction
See terminal instruction.
rightmost (bit/word)
The lowest numbered bits of a group of bits, generally of an entire word, or the
lowest numbered words of a group of words. These bits/words are often called
least-significant bits/words.
rising edge
The point where a signal actually changes from an OFF to an ON status.
ROM
Read only memory; a type of digital storage that cannot be written to. A ROM
chip is manufactured with its program or data already stored in it and can never
be changed. However, the program or data can be read as many times as
desired.
rotate register
A shift register in which the data moved out from one end is placed back into the
shift register at the other end.
RS-232C interface
An industry standard for serial communications.
RUN mode
The operating mode used by the PC for normal control operations.
rung
See instruction line.
scan
The process used to execute a ladder-diagram program. The program is
examined sequentially from start to finish and each instruction is executed in
turn based on execution conditions.
scan time
See cycle time.
scheduled interrupt
An interrupt that is automatically generated by the system at a specific time or
program location specified by the operator. Scheduled interrupts result in the
execution of specific subroutines that can be used for instructions that must be
executed repeatedly at a specified interval of time.
SCP
See subtract count input.
seal
See self-maintaining bit.
self diagnosis
A process whereby the system checks its own operation and generates a warn-
ing or error if an abnormality is discovered.
Summary of Contents for SYSMAC CPM1
Page 1: ...Cat No W262 E1 4 Programmable Controllers SYSMAC CPM1 OPERATION MANUAL ...
Page 2: ...CPM1 Programmable Controllers Operation Manual Revised February 1998 ...
Page 116: ...105 Appendix B Dimensions All dimensions are in millimeters CPM1 10CDR j 121 130 85 81 90 ...
Page 118: ...Appendix B Dimensions 107 CPM1 20EDR 81 90 171 180 85 ...
Page 119: ...Appendix B Dimensions 108 CPM1 CIF01 90 81 21 30 205 50 56 CPM1 CIF11 90 81 21 30 205 50 61 ...