Analog-to-Digital Converter (ADC12B16CV1)
S12XS Family Reference Manual, Rev. 1.13
Freescale Semiconductor
273
10.1.3
Block Diagram
Figure 10-1. ADC12B16C Block Diagram
V
SSA
AN8
ATD_12B16C
Analog
MUX
Mode and
Successive
Approximation
Register (SAR)
Results
ATD 0
ATD 1
ATD 2
ATD 3
ATD 4
ATD 5
ATD 6
ATD 7
and DAC
Sample & Hold
V
DDA
V
RL
V
RH
Sequence Complete
+
-
Comparator
Clock
Prescaler
Bus Clock
ATD Clock
ATD 8
ATD 9
ATD 10
ATD 11
ATD 12
ATD 13
ATD 14
ATD 15
AN7
AN6
AN5
AN4
AN3
AN2
AN1
AN0
AN9
AN10
AN11
AN12
AN13
AN14
AN15
ETRIG0
(See device specifi-
cation for availability
ETRIG1
ETRIG2
ETRIG3
and connectivity)
Timing Control
ATDDIEN
ATDCTL1
Trigger
Mux
Internal
Clock
Interrupt
Compare Interrupt
ICLK
Summary of Contents for MC9S12XS128
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