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representation). If the input is equal to or less than V
REFL
, the converter circuit converts it
to 0x000. Input voltages between V
REFH
and V
REFL
are straight-line linear conversions.
There is a brief current associated with V
REFL
when the sampling capacitor is charging.
The input is sampled for 3.5 cycles of the ADCK source when ADC_SC3[ADLSMP] is
low, or 23.5 cycles when ADC_SC3[ADLSMP] is high.
For minimal loss of accuracy due to current injection, pins adjacent to the analog input
pins should not be transitioning during conversions.
15.6.2 Sources of error
Several sources of error exist for A/D conversions. These are discussed in the following
sections.
15.6.2.1 Sampling error
For proper conversions, the input must be sampled long enough to achieve the proper
accuracy. Given the maximum input resistance of approximately 7 kΩ and input
capacitance of approximately 5.5 pF, sampling to within 1/4 LSB (at 12-bit resolution)
can be achieved within the minimum sample window (3.5 cycles at 8 MHz maximum
ADCK frequency) provided the resistance of the external analog source (R
AS
) is kept
below 2 kΩ.
Higher source resistances or higher-accuracy sampling is possible by setting
ADC_SC3[ADLSMP] (to increase the sample window to 23.5 cycles) or decreasing
ADCK frequency to increase sample time.
15.6.2.2 Pin leakage error
Leakage on the I/O pins can cause conversion error if the external analog source
resistance (R
AS
) is high. If this error cannot be tolerated by the application, keep R
AS
lower than V
DDA
/ (2
N
*I
LEAK
) for less than 1/4 LSB leakage error (N = 8 in 8-bit, 10 in
10-bit or 12 in 12-bit mode).
15.6.2.3 Noise-induced errors
System noise that occurs during the sample or conversion process can affect the accuracy
of the conversion. The ADC accuracy numbers are guaranteed as specified only if the
following conditions are met:
Chapter 15 Analog-to-digital converter (ADC)
MC9S08PA4 Reference Manual, Rev. 5, 08/2017
NXP Semiconductors
323
Summary of Contents for MC9S08PA4
Page 1: ...MC9S08PA4 Reference Manual Supports MC9S08PA4 Document Number MC9S08PA4RM Rev 5 08 2017 ...
Page 2: ...MC9S08PA4 Reference Manual Rev 5 08 2017 2 NXP Semiconductors ...
Page 22: ...MC9S08PA4 Reference Manual Rev 5 08 2017 22 NXP Semiconductors ...
Page 28: ...System clock distribution MC9S08PA4 Reference Manual Rev 5 08 2017 28 NXP Semiconductors ...
Page 150: ...Port data registers MC9S08PA4 Reference Manual Rev 5 08 2017 150 NXP Semiconductors ...
Page 196: ...Human machine interfaces HMI MC9S08PA4 Reference Manual Rev 5 08 2017 196 NXP Semiconductors ...
Page 224: ...Instruction Set Summary MC9S08PA4 Reference Manual Rev 5 08 2017 224 NXP Semiconductors ...
Page 232: ...Functional Description MC9S08PA4 Reference Manual Rev 5 08 2017 232 NXP Semiconductors ...
Page 258: ...FTM Interrupts MC9S08PA4 Reference Manual Rev 5 08 2017 258 NXP Semiconductors ...
Page 294: ...Functional description MC9S08PA4 Reference Manual Rev 5 08 2017 294 NXP Semiconductors ...
Page 398: ...Resets MC9S08PA4 Reference Manual Rev 5 08 2017 398 NXP Semiconductors ...
Page 400: ...MC9S08PA4 Reference Manual Rev 5 08 2017 400 NXP Semiconductors ...