M68HC16 Z SERIES
REGISTER SUMMARY
USER’S MANUAL
D-65
SIZE — Transfer Data Size
0 = 8-bit data transfer.
1 = 16-bit data transfer.
SPBR[7:0] — Serial Clock Baud Rate
The SPI uses a modulus counter to derive the SCK baud rate from the MCU system
clock. Baud rate is selected by writing a value from 2 to 255 into SPBR[7:0].
The following expressions apply to SCK baud rate:
or
Giving SPBR[7:0] a value of zero or one disables SCK (disable state determined by
CPOL). At reset, the SCK baud rate is initialized to one-eighth of the system clock
frequency.
D.7.14 SPI Status Register
SPSR contains information concerning the current serial transmission. Only the SPI
can set bits in SPSR. The CPU16 reads SPSR to obtain SPI status information and
writes it to clear status flags.
SPIF — SPI Finished Flag
0 = SPI is not finished.
1 = SPI is finished.
WCOL — Write Collision
0 = No attempt to write to the SPDR happened during the serial transfer.
1 = Write collision occurred.
Clearing WCOL is accomplished by reading the SPSR while WCOL is set and then
either reading the SPDR prior to SPIF being set, or reading or writing the SPDR after
SPIF is set.
SPSR — SPI Status Register
$YFFC3C
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
SPIF
WCOL
0
MODF
0
0
0
0
0
0
0
0
0
0
0
0
RESET:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SCK Baud Rate
f
sys
2
SPBR[7:0]
×
-------------------------------------
=
SPBR[7:0]
f
sys
2
SCK Baud Rate Desired
×
--------------------------------------------------------------------------
=
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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