REGISTER SUMMARY
M68HC16 Z SERIES
D-48
USER’S MANUAL
SPBR[7:0] — Serial Clock Baud Rate
The QSPI uses a modulus counter to derive the SCK baud rate from the MCU system
clock. Baud rate is selected by writing a value from two to 255 into SPBR[7:0]. The
following equation determines the SCK baud rate:
or
Giving SPBR[7:0] a value of zero or one disables the baud rate generator. SCK is dis-
abled and assumes its inactive state value. No serial transfers occur. At reset, the SCK
baud rate is initialized to one-eighth of the system clock frequency. SPBR has 254 ac-
tive values.
lists several possible baud values and the corresponding SCK
frequency based on a 16.78-MHz system clock.
D.6.11 QSPI Control Register 1
SPCR1 enables the QSPI and specifies transfer delays. SPCR1 must be written last
during initialization because it contains SPE. Writing a new value to SPCR1 while the
QSPI is enabled disrupts operation.
SPE — QSPI Enable
0 = QSPI is disabled. QSPI pins can be used for general-purpose I/O.
1 = QSPI is enabled. Pins allocated by PQSPAR are controlled by the QSPI.
Table D-36 Examples of SCK Frequencies
f
sys
Required
Division Ratio
Value of SPBR
Actual SCK
Frequency
16.78 MHz
4
2
4.19 MHz
8
4
2.10 MHz
16
8
1.05 MHz
34
17
493 kHz
168
84
100 kHz
510
255
33 kHz
SPCR1 — QSPI Control Register 1
$YFFC1A
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
SPE
DSCKL[6:0]
DTL[7:0]
RESET:
0
0
0
0
0
1
0
0
0
0
0
0
0
1
0
0
SCK Baud Rate
f
sys
2
SPBR[7:0]
×
-------------------------------------
=
SPBR[7:0]
f
sys
2
SCK
×
Baud Rate Desired
--------------------------------------------------------------------------
=
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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