MS51
Nov. 28, 2019
Page
267
of 491
Rev 1.00
MS51
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SE
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CHNICAL RE
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UAL
CONFIG0
7
6
5
4
3
2
1
0
CBS
-
OCDPWM
OCDEN
-
RPD
LOCK
-
R/W
-
R/W
R/W
-
R/W
R/W
-
Factory default value: 1111 1111b
Bit
Name
Description
5
OCDPWM
PWM output state under OCD halt
This bit decides the output state of PWM when OCD halts CPU.
1 = Tri-state pins those are used as PWM outputs.
0 = PWM continues.
Note that this bit is valid only when the corresponding PIO bit of PWM channel is set as 1.
4
OCDEN
OCD enable
1 = OCD Disabled.
0 = OCD Enabled.
Note:
If MCU run in OCD debug mode and OCDEN = 0, hard fault reset will be disabled and
only HardF flag be asserted.
6.3.4
96-Bit Unique Code
Before shipping out, each MS51 chip was factory pre-programmed with a 96-bit width serial number,
which is guaranteed to be unique. The serial number is called Unique Code. The user can read the
Unique Code only by IAP command. Please see Chapter 6.3.1.1IAP Commands.
6.3.5
CONFIG Bytes
The MS51 has several hardware configuration bytes, called CONFIG, those are used to configure the
hardware options such as the security bits, system clock source, and so on. These hardware options
can be re-configured through the parallel Writer, In-Circuit-Programming (ICP), or In-Application-
Programming (IAP). Several functions, which are defined by certain CONFIG bits are also available to
be re-configured by SFR. Therefore, there is a need to load such CONFIG bits into respective SFR
bits. Such loading will occur after resets. These SFR bits can be continuously controlled via user’s
software.
Note:
CONFIG bits marked as “-“should always keep un-programmed.
