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Appendix C: Troubleshooting
Appendix C: Troubleshooting
Appendix C: Troubleshooting
Appendix C: Troubleshooting
Appendix C: Troubleshooting
N-1000-III/IV
C–5
C–5
C–5
C–5
C–5
8.3. With the TAMPER Switch input circuit CLOSED (Tamper Switch
depressed) and the /Primary-Power-Status input HIGH (JP6 jumper 2&3)
the relay outputs 1 through 8 will follow the state of the Reader Data
inputs and RAM memory test as follows:
8.3.1. Relay 1 pulses when Reader 2, Data-0 (TB5-6) is tied to common.
8.3.2. Relay 2 energizes when Reader 2, Data-1 (TB5-7) is tied to common.
8.3.3. Relay 3 pulses when Reader 1, Data-0 (TB5-3) is tied to common.
8.3.4. Relay 4 energizes when Reader 1, Data-1 (TB5-2) is tied to common.
8.3.5. Relays 5 and 6 both ON indicate that memory chip U7 is OK.
8.3.6. Relays 7 and 8 both ON indicate that memory chip U6 is OK.
8.4. With the TAMPER Switch input circuit CLOSED (Tamper Switch
depressed) and the /Primary-Power-Status input LOW (JP6 open) the
relay outputs 1 through 8 will follow the state of the supervised inputs as
follows; (Note: EOL = 2.2K ohms)
Resulting Relay States
Resulting Relay States
Resulting Relay States
Resulting Relay States
Resulting Relay States
Input/TB
Input Condition
R1
R2
R3
R4
R5
R6
R7
R8
W
W
W
W
With TB8-1 & TB8-2 both OPEN:
ith TB8-1 & TB8-2 both OPEN:
ith TB8-1 & TB8-2 both OPEN:
ith TB8-1 & TB8-2 both OPEN:
ith TB8-1 & TB8-2 both OPEN:
Input 1
Open
Off
On
TB7-4
EOL
Off
Off
Closed
On
Off
Input 5
Open
Off
On
TB6-1
EOL
Off
Off
Closed
On
Off
Input 9
Open
Off
On
TB6-5
EOL
Off
Off
Closed
On
Off
Input 13
Open
Off
On
TB6-9
EOL
Off
Off
Closed
On
Off
W
W
W
W
With TB8-1 to Common & TB8-2 OPEN:
ith TB8-1 to Common & TB8-2 OPEN:
ith TB8-1 to Common & TB8-2 OPEN:
ith TB8-1 to Common & TB8-2 OPEN:
ith TB8-1 to Common & TB8-2 OPEN:
Input 2
Open
Off
On
TB7-5
EOL
Off
Off
Closed
On
Off
Input 6
Open
Off
On
TB6-2
EOL
Off
Off
Closed
On
Off
Input 10
Open
Off
On
TB6-6
EOL
Off
Off
Closed
On
Off
Input 14
Open
Off
On
TB6-10
EOL
Off
Off
Closed
On
Off