CHAPTER 10 SERIAL INTERFACE FUNCTION
User’s Manual U13850EJ6V0UD
322
The communication reservation timing is shown below.
Figure 10-16. Communication Reservation Timing
2
1
3
4
5
6
2
1
3
4
5
6
7
8
9
SCL
SDA
Program processing
Hardware processing
Write to
IIC0
Set SPD
and INTIIC0
STT
=1
Communication
reservation
Set
STD
Output by master with bus mastership
IICn:
IIC shift register n
STTn:
Bit 1 of IIC control register n (IICCn)
STDn:
Bit 1 of IIC status register n (IICSn)
SPDn:
Bit 0 of IIC status register n (IICSn)
Remark
n = 0, 1
Communication reservations are acknowledged at the following timing. After bit 1 (STDn) of IIC status register n
(IICSn) is set to 1, a communication reservation can be made by setting bit 1 (STTn) of IIC control register n (IICCn)
to 1 before a stop condition is detected (n = 0, 1).
Figure 10-17. Timing for Acknowledging Communication Reservations
SCL
SDA
STD
SPD
Standby mode
Remark
n = 0, 1