NEC POWERMATE PROFESSIONAL 9000E - SERVICE, Service Manual

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4-24 System Board
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32 MB to 1 GB of SDRAM upgradeable with 32-MB, 64-MB, 128-MB,
or 256-MB increments through DIMM sockets on system board
„
512-KB write-back secondary cache memory on processor
„
System Setup utility built into the BIOS
„
2-Mb Flash ROM for fast economical BIOS upgrades
„
PCI local bus for fast data transfer
„
Board Management Controller (BMC) chip for monitoring voltage,
temperature, and security
„
external connectors for connecting the following external devices:
„
Personal system/2 (PS/2(r))-style mouse
„
PS/2-style keyboard
„
Bi-directional Enhanced Parallel Port (EPP) and Enhanced Capabilities
Port (ECP) support for a parallel printer
„
Serial devices through two buffered 16C550 UART serial ports,
supporting up to 115.2 KB per second (one external connector is on a
bracket in an expansion slot)
„
Two USB devices (external connectors are on a bracket in an expansion
slot).
The following table lists the major components on the system board.
System Board Components
Component Function
Pentium II Processor (mounted in a
S.E.C. cartridge) 266-MHz Pentium II processor
300-MHz Pentium II processor
333-MHz Pentium II processor
350-MHz Pentium II processor
400-MHz Pentium II processor
450-MHz Pentium II processor
Intel N440BX Chipset:
82371EB PCI ISA IDE Xcelerator
(PIIX4E) Functions as a PCI to ISA bridge; PCI IDE functionality; a USB
controller; integrated dual channel enhanced IDE interface
with support for Ultra DMA/33; enhanced DMA controller;
interrupt controller, with support for 15 interrupts; real-time
clock with 256-byte, battery-backed CMOS static RAM
(SRAM); 16-bit counters based on 82C54.
82558 LAN controller The Intel 82558 LAN controller provides an Ethernet LAN
interface for both 10Base-T and 100Base-TX connectivity. The
controller features:
CSMA/CD protocol engine
PCI compatibility
DMA engine for movement of command, status, and
network data across the PCI bus
Standard MII interface for access to IEEE 802.3 compliant
physical layer interface.