manualshive.com logo in svg

National Instruments PXIe-6674T, User Manual

Share
Download
National Instruments PXIe-6674T User Manual Download Page 35

liable for errors contained herein or for incidental or consequential damages in connection
with the furnishing, performance, or use of this material.

Trademarks

Refer to the 

NI Trademarks and Logo Guidelines

 at 

ni.com/trademarks

 for more information

on NI trademarks.

ARM, Keil, and µVision are trademarks or registered of ARM Ltd or its subsidiaries.

LEGO, the LEGO logo, WEDO, and MINDSTORMS are trademarks of the LEGO Group.

TETRIX by Pitsco is a trademark of Pitsco, Inc.

FIELDBUS FOUNDATION

™

 and FOUNDATION

™

 are trademarks of the Fieldbus

Foundation.

EtherCAT

®

 is a registered trademark of and licensed by Beckhoff Automation GmbH.

CANopen

®

 is a registered Community Trademark of CAN in Automation e.V.

DeviceNet

™

 and EtherNet/IP

™

 are trademarks of ODVA.

Go!, SensorDAQ, and Vernier are registered trademarks of Vernier Software & Technology.
Vernier Software & Technology and vernier.com are trademarks or trade dress.

Xilinx is the registered trademark of Xilinx, Inc.

Taptite and Trilobular are registered trademarks of Research Engineering & Manufacturing
Inc.

FireWire

®

 is the registered trademark of Apple Inc.

Linux

®

 is the registered trademark of Linus Torvalds in the U.S. and other countries.

Handle Graphics

®

, MATLAB

®

, Simulink

®

, Stateflow

®

, and xPC TargetBox

®

 are registered

trademarks, and Simulink Coder

™

, TargetBox

™

, and Target Language Compiler

™

 are

trademarks of The MathWorks, Inc.

Tektronix

®

, Tek, and Tektronix, Enabling Technology are registered trademarks of Tektronix,

Inc.

The Bluetooth

®

 word mark is a registered trademark owned by the Bluetooth SIG, Inc.

The ExpressCard

™

 word mark and logos are owned by PCMCIA and any use of such marks

by National Instruments is under license.

The mark LabWindows is used under a license from Microsoft Corporation. Windows is a
registered trademark of Microsoft Corporation in the United States and other countries.

Other product and company names mentioned herein are trademarks or trade names of their
respective companies.

PXIe-6674T User Manual

  | 

© National Instruments

  | 

35

Summary of Contents for PXIe-6674T

Page 1: ...as follows Measurement hardware documentation This documentation contains detailed information about the measurement hardware that plugs into or is connected to the computer Use this documentation fo...

Page 2: ...ompliance Information 36 WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS 36 Introduction The PXIe 6674T timing and synchronization module enables you to share clocks and triggers between module...

Page 3: ...CVI is a complete ANSI C ADE that features an interactive video interface code generation tools and the LabWindows CVI Data Acquisition and Easy I O libraries Safety Information The following section...

Page 4: ...y occur in electrical distribution systems The following is a description of measurement categories Measurement Category I is for measurements performed on circuits not directly connected to the elect...

Page 5: ...ng software packages and documentation LabVIEW LabWindows CVI Microsoft Visual C MSVC PXI EMC filler panels National Instruments part number 778700 01 PXI Express chassis PXI Express embedded controll...

Page 6: ...fully insert the module into the chassis 6 Screw the front panel of the device to the front panel mounting rail of the chassis 7 If adjacent slots are not populated use EMC filler panels to cover the...

Page 7: ...erview This chapter presents an overview of the hardware functions of the PXIe 6674T Refer to Figure 2 on page 8 for a functional overview of the PXIe 6674T hardware PXIe 6674T User Manual National In...

Page 8: ...ng PXI Express PXIe_CLK100 PXIe_DSTARA 0 16 OCXO CLK10 CLK100 PXIe_DSTARC 0 16 PXIe_DSTARB 0 16 PFI 0 Threshold DAC PFI 0 Driver Comparator Driver Comparator PFI 1 Threshold DAC LVDS Driver Receiver P...

Page 9: ...PFI 4 LVDS 2 CLK OUT CLK IN 1 Access LED 2 Active LED 3 CLKOUT Connector 4 PFI 0 5 Connectors 5 CLKIN Connector Access LED The Access LED indicates the communication status of the PXIe 6674T Refer to...

Page 10: ...ting If applicable check that the chassis fan air intake is not blocked and that the fan filters are clean Make sure that the ambient temperature around the chassis isn t above the rated temperature s...

Page 11: ...able Function Interface which can be individually configured for either single ended operation or LVDS operation In LVDS mode the connectors are paired and can be programmatically set as either inputs...

Page 12: ...OCXO is an extremely stable and accurate frequency source CLKIN In from front panel CLKIN is the signal connected to the SMA input connector of the same name CLKIN can be routed directly to PXI_CLK10_...

Page 13: ...signals to and from these lines Note PXI_TRIG 0 5 are also known as RTSI 0 5 in some hardware devices and APIs However PXI_TRIG 6 7 are not identical to RTSI 6 7 PXI_STAR 0 16 In Out to from chassis T...

Page 14: ...in advanced clock generation circuitry for generating clock signals from below 1 Hz to 1 GHz with very fine frequency resolution The clock generation circuitry is based on a direct digital synthesis D...

Page 15: ...re has the advantage the PXI_CLK10 and PXIe_CLK100 are always sourced from the same reference oscillator and therefore it is impossible to lose PXI_CLK10 or PXIe_CLK100 by disconnecting the reference...

Page 16: ...by using the CLKIN SMA on the front panel CLKIN is an AC coupled 50 terminated input to the PXIe 6674T In order to increase the amplitude of signals the CLKIN receiver can use the CLKIN circuitry fea...

Page 17: ...al signal paths to connect the system timing slot to each PXI Express peripheral slot up to 17 peripheral slots These signals are PXIe_DSTARA PXIe_DSTARB and PXIe_DSTARC PXIe_DSTARA PXIe_DSTARA is use...

Page 18: ...ork divides the 17 PXIe_DSTARA lines into four banks as shown in Table 5 on page 18 Table 5 PXIe_DSTARA Divisions Bank 0 Bank 1 Bank 2 Bank 3 PXIe_DSTARA 0 3 PXIe_DSTARA 4 7 PXIe_DSTARA 8 11 PXIe_DSTA...

Page 19: ...FIs When enabled for LVDS operation the PFI_LVDS pair can be configured as either an input or an output PFI_LVDS lines can not be used as an input and output at the same time Because of the increased...

Page 20: ...into a 50 load and is also AC coupled The sources available to be routed to CLKOUT differ depending on whether the low speed or high speed driver is used The sources available to the low speed driver...

Page 21: ...tware Trigger are routed to SOURCE of each Selection Circuitry block SYNCHRONIZATION CLOCKS for PXI_STAR 0 16 PXI_TRIG 0 7 and PXIe DSTARB 0 16 Selection Circuitry Selection Circuitry Selection Circui...

Page 22: ...outing operations must also define a third signal known as the synchronization clock Refer to the Choosing the Type of Routing section for more information on synchronous versus asynchronous routing F...

Page 23: ...PFI inputs are programmable The input signal is generated by comparing the input voltage on the PFI connectors to the voltage output of software programmable DACs The thresholds for the PFI lines are...

Page 24: ...vided by the second frequency divider 2m up to 512 Refer to Choosing the Type of Routing section for more information on the sychronization clock Note The PFI synchronization clock is the same for all...

Page 25: ...Triggers The PXI triggers go to all the slots in the chassis All modules receive the same PXI triggers so PXI trigger 0 is the same for the system timing slot as it is for Slot 3 and so on This featur...

Page 26: ...be matched to within 1 ns A typical upper limit for the skew in most NI PXI Express chassis is 500 ps The low skew of the PXI star trigger bus is useful for applications that require triggers to arriv...

Page 27: ...ady logic high or low Backplane synchronization clock Refer to the Using the PXI Triggers section for more information on the backplane synchronization clock Choosing the Type of Routing The PXIe 6674...

Page 28: ...chronous routing operation on the PXIe 6674T can be any of the following lines Any front panel PFI pin PFI 0 5 as single ended Any front panel PFI pin as LVDS PFI_LVDS 0 2 Any PXI star trigger line PX...

Page 29: ...or example PXI_CLK10 all receiving devices can act on the trigger at the same time as shown in Figure 10 on page 29 Figure 10 Synchronous Routing to Multiple Destinations PXI_CLK10 Trigger Destination...

Page 30: ...le methods to ensure this requirement is met go to ni com info and enter the Info Code SyncTriggerRouting Possible sources for synchronous routing with the PXIe 6674T include the following sources Any...

Page 31: ...to an external reference clock the phase between the clocks can be adjusted The time between rising edges of PXI_CLK10 and the input clock is minimized using this constant Note The PXI_CLK10 phase is...

Page 32: ...f the receiver the device suffering interference Relocate the transmitter the device generating interference with respect to the receiver Plug the transmitter into a different outlet so that the trans...

Page 33: ...ace the product NI may use new or refurbished parts or products that are equivalent to new in performance and reliability and are at least functionally equivalent to the original part or product You m...

Page 34: ...d Party Legal Notices You can find end user license agreements EULAs and third party legal notices in the following locations Notices are located in the National Instruments _Legal Information and Nat...

Page 35: ...de dress Xilinx is the registered trademark of Xilinx Inc Taptite and Trilobular are registered trademarks of Research Engineering Manufacturing Inc FireWire is the registered trademark of Apple Inc L...

Page 36: ...D TO DEATH PERSONAL INJURY SEVERE PROPERTY DAMAGE OR ENVIRONMENTAL HARM COLLECTIVELY HIGH RISK USES FURTHER PRUDENT STEPS MUST BE TAKEN TO PROTECT AGAINST FAILURES INCLUDING PROVIDING BACK UP AND SHUT...

Reviews:

No comments

Brands by name

Popular brands

Load more brands