If the PFI_LVDS output is used for trigger routing, it is sourced from the FPGA and has all the
same trigger routing characteristics as other trigger destinations. Refer to the
section for details on using PFI_LVDS for sending and
receiving trigger signals.
CLKOUT
The CLKOUT SMA connector on the front panel provides a means to export a clock signal
from the PXIe-6674T to an external device or another system timing module. The CLKOUT
driver uses two separate circuits for driving CLKOUT, one for low speed frequencies (50 MHz
and below) and one for high speed (above 50 MHz). The low speed driver uses 5 V CMOS
logic with source impedance of 50 Ω and is AC coupled. The high speed driver produces an
800 mV
pp
swing into a 50 Ω load and is also AC coupled.
The sources available to be routed to CLKOUT differ depending on whether the low speed or
high speed driver is used. The sources available to the low speed driver are PXI_CLK10,
OCXO, and Clock Generation for generated frequencies 100 MHz and below. Sources
available to the high speed CLKOUT are Clock Generation and outputs from the
PXIe_DSTARA network through the PFI_LVDS cross point switch.
NI-Sync software will select the low speed or high speed driver automatically based on the
source connected to CLKOUT.
Routing Signals
The PXIe-6674T has versatile trigger routing capabilities. It can route signals to and from the
front panel, the PXI star triggers, PXIe_DSTARB, and PXIe_DSTARC.
on page 21 and
on page 22 summarize the routing features of the
PXIe-6674T. The remainder of this chapter details the capabilities and constraints of the
routing architecture.
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PXIe-6674T User Manual
