© National Instruments
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5-3
Figure 5-3.
NI-7935R Socketed CLIP Architecture
Accessing the Xilinx Vivado Tools
Complete the following steps to run Xilinx Vivado:
1.
If you installed Xilinx Vivado separately from LabVIEW FPGA, use this version.
Otherwise, LabVIEW FPGA installs LabVIEW FPGA Xilinx Tools.
Note
If Vivado is installed by LabVIEW FPGA, it does not appear in
Programs
and Features
.
2.
Open the Xilinx Vivado Tool directory by navigating to
C:\NIFPGA\programs\
VivadoXXXX_Y
, where
XXXX
and
Y
refer to the Xilinx Vivado tool versions. For
example, <VIVADO_DIR> version 2013.4 is located at
C:\NIFPGA\programs\
Vivado2013_4
.
3.
Run the Xilinx Vivado batch file:
<XilinxVivadoDir>\bin\vivado.bat
.
You may receive the following warning when launching Vivado.
Your XILINX_EDK environment variable is undefined. You may not be
able to run some features properly. Please set up your XILINX_EDK
environment to get full functionality.
This error message is expected. You can ignore the error message if you are not using the
Xilinx Embedded Development Kit (EDK). The EDK is not required for development with
the NI-793xR.
4.
Click
New Project
and follow the instructions in the wizard.
NI-79
3
5R
Xilinx Kintex-7 FPGA
S
ocketed CLIP
PORT 0 /
PORT 1
Connector
s
156.25 MHz/
3
12.5 MHz
Clock
MGT_RefClk
s
High
S
peed
S
eri
a
l IO
High-
S
peed
S
eri
a
l
Protocol IP
L
ab
VIEW FPGA VI
+
L
ab
VIEW FPGA
Xilinx GTXE2_CHANNEL/
GTXE2_COMMON
Primitive
s