N.A.T. NAT-MCH, Technical Reference

Page: 6 / 57

NAT-MCH Clock-PCB – Technical Reference Manual
Version 1.4
© N.A.T. GmbH
6
List of Tables
Table 1:
List of used Abbreviations ..................................................................................... 8
Table 2: NAT-MCH CLK Module Features ........................................................................ 9
Table 3: MCH Connector CON1........................................................................................ 24
Table 4: Connector to Basic-PCB CON2 ........................................................................... 26
Table 5: Connector to Hub-PCB CON3 ............................................................................. 27
Table 6: Altera FPGA Programming Port .......................................................................... 27
Table 7: Board Identifier Register ...................................................................................... 29
Table 8: PCB Revision Register......................................................................................... 29
Table 9: FW_VERSION Register ...................................................................................... 29
Table 10: FPGA Revision Register ...................................................................................... 30
Table 11: REF0_SEL Register ............................................................................................. 31
Table 12: REF0_SEL - Register Bits ................................................................................... 31
Table 13: REF1_SEL Register ............................................................................................. 32
Table 14: REF1_SEL - Register Bits ................................................................................... 32
Table 15: SRC_SEL1 Register............................................................................................. 33
Table 16: SRC_SEL1 - Register Bits ................................................................................... 33
Table 17: SRC_SEL2 Register............................................................................................. 34
Table 18: SRC_SEL2 - Register Bits ................................................................................... 34
Table 19: SRC_SEL3 Register............................................................................................. 35
Table 20: SRC_SEL3 - Register Bits ................................................................................... 35
Table 21: SRC_SEL_CLK1_UD Register ........................................................................... 36
Table 22: SRC_SEL_CLK1_UD - Register Bits ................................................................. 36
Table 23: SRC_SEL_CLK3_UD Register ........................................................................... 37
Table 24: SRC_SEL_CLK3_UD - Register Bits ................................................................. 37
Table 25: TRANSC_CTL1 Register .................................................................................... 38
Table 26: TRANSC_CTL1 - Register Bits .......................................................................... 38
Table 27: TRANSC_CTL2 Register .................................................................................... 39
Table 28: TRANSC_CTL2 - Register Bits .......................................................................... 39
Table 29: TRANSC_CTL3 Register .................................................................................... 40
Table 30: TRANSC_CTL3 - Register Bits .......................................................................... 40
Table 31: TRANSC_CTL4 Register .................................................................................... 41
Table 32: TRANSC_CTL4 - Register Bits .......................................................................... 41
Table 33: TRANSC_CTL5 Register .................................................................................... 42
Table 34: TRANSC_CTL5 - Register Bits .......................................................................... 42
Table 35: TRANSC_CTL6 Register .................................................................................... 43
Table 36: TRANSC_CTL6 - Register Bits .......................................................................... 43
Table 37: TRANSC_CTL7 Register .................................................................................... 44
Table 38: TRANSC_CTL7 - Register Bits .......................................................................... 44
Table 39: PLL_CTR1 Register............................................................................................. 45
Table 40: PLL_CTR1 – Register Bits .................................................................................. 45
Table 41: PLL_CTR2 Register............................................................................................. 46