NAT-MCH Clock-PCB – Technical Reference Manual
Version 1.4
© N.A.T. GmbH
31
11.3.5 Reference 0 Selection Register
The value of the Reference 0 Selection Register decides which source is connected to REF0
of the PLL.
Table 11:
REF0_SEL Register
Reference 0 Selection - Address 0x04
Default value 0x00
Bit
7
6
5
4
3
2
1
0
Access
R
R
R
R/W
R/W
R/W
R/W
R/W
Func -
-
-
REF0_SEL
Table 12:
REF0_SEL - Register Bits
Bit
Name
Function
[4..0] REF0_SEL
Reference Select for REF0 input of the PLL
0x01 – CLK2 of AMC1
0x02 – CLK2 of AMC2
:
0x0C – CLK2 of AMC12
0x0D – CLK1 Update (from 2
nd
MCH)
0x0E – CLK3 Update (from 2
nd
MCH)
0x11 – CLK1 of AMC1
0x12 – CLK1 of AMC2
:
0x1C – CLK1 of AMC12
all other values result in no connection
[7..5] -
no function
write as 0 and ignore when read
