N.A.T. NAT-MCH, Technical Reference

Page: 4 / 57

NAT-MCH Clock-PCB – Technical Reference Manual
Version 1.4
© N.A.T. GmbH
4
Table of Contents
CONVENTIONS................................................................................................................................................... 8
1 BOARD SPECIFICATION ........................................................................................................................ 9
2 STATEMENT ON ENVIRONMENTAL PROTECTION .................................................................... 10
2.1 C
OMPLIANCE TO
R
O
HS D
IRECTIVE
.................................................................................................... 10
2.2 C
OMPLIANCE TO
WEEE D
IRECTIVE
................................................................................................... 10
2.3 C
OMPLIANCE TO
CE D
IRECTIVE
......................................................................................................... 11
3 INSTALLATION ...................................................................................................................................... 12
3.1 S
AFETY
N
OTE
..................................................................................................................................... 12
3.2 I
NSTALLATION
P
REREQUISITES AND
R
EQUIREMENTS
......................................................................... 12
3.2.1 Requirements................................................................................................................................. 12
3.2.2 Power supply................................................................................................................................. 12
3.2.3 Automatic Power Up ..................................................................................................................... 12
4 INTRODUCTION ..................................................................................................................................... 13
5 CLK MODULE BASICS .......................................................................................................................... 14
6 BLOCK DIAGRAM OF THE NAT-MCH CLK MODULE ................................................................. 15
7 BOARD FEATURES ................................................................................................................................ 16
8 FUNCTIONAL BLOCKS......................................................................................................................... 18
8.1 S
TRATUM
3 PLL ................................................................................................................................. 18
8.2 M
ICROPROCESSOR
.............................................................................................................................. 19
8.3 CLK-M
ULTIPLEX
F
UNCTION
.............................................................................................................. 19
8.4 M-LVDS / HCSL T
RANSCEIVER
........................................................................................................ 19
9 LOCATION OVERVIEW........................................................................................................................ 21
10 CONNECTORS......................................................................................................................................... 23
10.1 C
ONNECTOR
O
VERVIEW
..................................................................................................................... 23
10.2 MCH C
ONNECTOR
CON1 .................................................................................................................. 24
10.3 C
ONNECTOR
C
ON
2: I
NTERFACE TO
B
ASIC
-PCB ................................................................................. 26
10.4 C
ONNECTOR
CON3: I
NTERFACE TO
H
UB
-PCB................................................................................... 27
10.5 C
ONNECTOR
JP1: A
LTERA
FPGA P
ROGRAMMING
P
ORT
.................................................................... 27
11 NAT-MCH CLK MODULE PROGRAMMING NOTES ..................................................................... 28
11.1 SPI I
NTERFACE
................................................................................................................................... 28
11.2 I²C I
NTERFACE
.................................................................................................................................... 28
11.3 R
EGISTER
............................................................................................................................................ 28
11.3.1 Board Identifier Register.......................................................................................................... 29
11.3.2 PCB Revision Register ............................................................................................................. 29
11.3.3 Firmware Version Register ...................................................................................................... 29
11.3.4 FPGA Revision Register........................................................................................................... 30
11.3.5 Reference 0 Selection Register ................................................................................................. 31
11.3.6 Reference 1 Selection Register ................................................................................................. 32