NAT-MCH Clock-PCB – Technical Reference Manual
Version 1.4
© N.A.T. GmbH
32
11.3.6 Reference 1 Selection Register
The value of the Reference 1 Selection Register decides which source is connected to REF1
of the PLL.
Table 13:
REF1_SEL Register
Reference 1 Selection - Address 0x05
Default value 0x00
Bit
7
6
5
4
3
2
1
0
Access
R
R
R
R/W
R/W
R/W
R/W
R/W
Func -
-
-
REF1_SEL
Table 14:
REF1_SEL - Register Bits
Bit
Name
Function
[4..0] REF1_SEL
Reference Select for REF1 input of the PLL
0x01 – CLK2 of AMC1
0x02 – CLK2 of AMC2
:
0x0C – CLK2 of AMC12
0x0D – CLK1 Update (from 2
nd
MCH)
0x0E – CLK3 Update (from 2
nd
MCH)
0x11 – CLK1 of AMC1
0x12 – CLK1 of AMC2
:
0x1C – CLK1 of AMC12
all other values result in no connection
[7..5] -
no function
write as 0 and ignore when read
