LTC3115-1
21
Rev. C
APPLICATIONS INFORMATION
Programming Custom Input UVLO Thresholds
With the addition of an external resistor divider connected
to the input voltage as shown in Figure 4, the RUN pin
can be used to program the input voltage at which the
LTC3115-1 is enabled and disabled.
For a rising input voltage, the LTC3115-1 is enabled when V
IN
reaches the threshold given by the following equation, where
R1 and R2 are the values of the resistor divider resistors:
V
TH(RISING)
=1.21V
R1+R2
R2
To ensure robust operation in the presence of noise, the
RUN pin has two forms of hysteresis. A fixed 100mV
of hysteresis within the RUN pin comparator provides a
minimum RUN pin hysteresis equal to 8.3% of the input
turn-on voltage independent of the resistor divider values.
In addition, an internal hysteresis current that is sourced
from the RUN pin during operation generates an additive
level of hysteresis which can be programmed by the value
of R1 to increase the overall hysteresis to suit the require-
ments of specific applications.
Once the IC is enabled, it will remain enabled until the
input voltage drops below the comparator threshold by
the hysteresis voltage, V
HYST
, as given by the follow-
ing equation where R1 and R2 are values of the divider
resistors:
V
HYST
= R1
•
0.5µA +
R1+R2
R2
0.1V
Therefore, the rising UVLO threshold and amount of hys-
teresis can be independently programmed via appropriate
selection of resistors R1 and R2. For high levels of hyster-
esis, the value of R1 can become larger than is desirable
in a practical implementation (greater than 1MΩ to 2MΩ).
In such cases, the amount of hysteresis can be increased
further through the addition of an additional resistor, R
H
,
as shown in Figure 5.
When using the additional R
H
resistor, the rising RUN pin
threshold remains as given by the original equation and
the hysteresis is given by the following expression:
V
HYST
= R1+R2
R2
0.1V+
R
H
R2+R
H
R1+R1R2
R2
0.5µA
(
)
Figure 4. Setting the Input UVLO Threshold and Hysteresis
Figure 5. Increasing Input UVLO hysteresis
LTC3115-1
GND
V
IN
RUN
R1
R2
31151 F04
LTC3115-1
GND
V
IN
RUN
R1
R
H
R2
3115 F05
To improve the noise robustness and accuracy of the
UVLO thresholds, the RUN pin input can be filtered by
adding a 1000pF capacitor from RUN to GND. Larger val-
ued capacitors should not be utilized because they could
interfere with operation of the hysteresis.
Bootstrapping the V
CC
Regulator
The high and low side gate drivers are powered through the
PV
CC
rail which is generated from the input voltage through
an internal linear regulator. In some applications, especially
at higher operating frequencies and high input and output
voltages, the power dissipation in the linear V
CC
regulator
can become a key factor in the conversion efficiency of the
converter and can even become a significant source of ther-
mal heating. For example, at a 1.2MHz switching frequency,
an input voltage of 36V, and an output voltage of 24V, the
total PV
CC
/V
CC
current is approximately 18mA as shown in
the Typical Performance Characteristics section of this data
sheet. As a result, this will generate 568mW of power dissipa-
tion in the V
CC
regulator which will result in an increase in die
temperature of approximately 24° above ambient in the DFN
package. This significant power loss will have a substantial
impact on the conversion efficiency and the additional heating
may limit the maximum ambient operating temperature for
the application.
