LTC3115-1
19
Rev. C
APPLICATIONS INFORMATION
Table 1 provides a small sampling of inductors that are
well suited to many LTC3115-1 applications.
In applications with V
OUT
≥ 20V, it is recommended that
a minimum inductance value, L
MIN
, be utilized where f is
the switching frequency:
L
MIN
=
12H
f / Hz
(
)
Table 1. Representative Surface Mount Inductors
PART NUMBER
VALUE
(µH)
DCR
(mΩ)
MAX DC
CURRENT (A)
SIZE (mm)
W
×
L
×
H
Coilcraft
LPS6225
LPS6235
MSS1038
D03316P
4.7
6.8
22
15
65
75
70
50
3.2
2.8
3.3
3.0
6.2
×
6.2
×
2.5
6.2
×
6.2
×
3.5
10.2
×
10.5
×
3.8
12.9
×
9.4
×
5.2
Cooper-Bussmann
CD1-150-R
DR1030-100-R
FP3-8R2-R
DR1040-220-R
15
10
8.2
22
50
40
74
54
3.6
3.18
3.4
2.9
10.5
×
10.4
×
4.0
10.3
×
10.5
×
3.0
7.3
×
6.7
×
3.0
10.3
×
10.5
×
4.0
Panasonic
ELLCTV180M
ELLATV100M
18
10
30
23
3.0
3.3
12
×
12
×
4.2
10
×
10
×
4.2
Sumida
CDRH8D28/HP
CDR10D48MNNP
CDRH8D28NP
10
39
4.7
78
105
24.7
3.0
3.0
3.4
8.3
×
8.3
×
3
10.3
×
10.3
×
5
8.3
×
8.3
×
3
Taiyo-Yuden
NR10050T150M
15
46
3.6
9.8
×
9.8
×
5
TOKO
B1047AS-6R8N
B1179BS-150M
892NAS-180M
6.8
15
18
36
56
42
2.9
3.3
3.0
7.6
×
7.6
×
5
10.3
×
10.3
×
4
12.3
×
12.3
×
4.5
W
ü
rth
7447789004
744771133
744066150
4.7
33
15
33
49
40
2.9
2.7
3.2
7.3
×
7.3
×
3.2
12
×
12
×
6
10
×
10
×
3.8
is the capacitance, t
LOW
is the switch pin minimum low
time, and I
LOAD
is the output current. Curves for the value
of t
LOW
as a function of switching frequency and tempera-
ture can be found in Typical Performance Characteristics
section of this data sheet.
∆V
P-P(BUCK)
=
I
LOAD
t
LOW
C
OUT
∆V
P-P(BOOST)
=
I
LOAD
fC
OUT
V
OUT
– V
IN
+ t
LOW
fV
IN
V
OUT
The output voltage ripple increases with load current and
is generally higher in boost mode than in buck mode.
These expressions only take into account the output volt-
age ripple that results from the output current being dis-
continuous. They provide a good approximation to the
ripple at any significant load current but underestimate
the output voltage ripple at very light loads where output
voltage ripple is dominated by the inductor current ripple.
In addition to output voltage ripple generated across the
output capacitance, there is also output voltage ripple
produced across the internal resistance of the output
capacitor. The ESR-generated output voltage ripple is pro-
portional to the series resistance of the output capacitor
and is given by the following expressions where R
ESR
is
the series resistance of the output capacitor and all other
terms are as previously defined.
∆V
P-P(BUCK)
=
I
LOAD
R
ESR
1– t
LOW
f
≅
I
LOAD
R
ESR
∆V
P-P(BOOST)
=
I
LOAD
R
ESR
V
OUT
V
IN
1– t
LOW
f
(
)
≅
I
LOAD
R
ESR
V
OUT
V
IN
Input Capacitor Selection
The PV
IN
pin carries the full inductor current and provides
power to internal control circuits in the IC. To minimize
input voltage ripple and ensure proper operation of the IC,
a low ESR bypass capacitor with a value of at least 4.7µF
should be located as close to this pin as possible. The
traces connecting this capacitor to PV
IN
and the ground
plane should be made as short as possible. The V
IN
pin
provides power to the V
CC
regulator and other internal
circuitry. If the PCB trace connecting V
IN
to PV
IN
is long, it
Output Capacitor Selection
A low ESR output capacitor should be utilized at the buck-
boost converter output in order to minimize output volt-
age ripple. Multilayer ceramic capacitors are an excellent
option as they have low ESR and are available in small
footprints. The capacitor value should be chosen large
enough to reduce the output voltage ripple to acceptable
levels. Neglecting the capacitor ESR and ESL, the peak-
to-peak output voltage ripple can be calculated by the fol-
lowing formulas, where f is the switching frequency, C
OUT
