LTC3115-1
12
Rev. C
For more information
PIN FUNCTIONS
(DHD/FE)
PWM/SYNC (Pin 16/Pin 19):
Burst Mode/PWM Mode
Control Pin and Synchronization Input. Forcing this pin
high causes the IC to operate in fixed frequency PWM
mode at all loads using the internal oscillator at the fre-
quency set by the RT Pin. Forcing this pin low places the
IC into Burst Mode operation for improved efficiency at
light load and reduced standby current. If an external clock
signal is connected to this pin, the buck-boost converter
will synchronize its switching with the external clock
using fixed frequency PWM mode operation. The pulse
width (negative or positive) of the applied clock should
be at least 100ns. The maximum operating voltage for the
PWM/SYNC pin is 5.5V. The PWM/SYNC pin can be con-
nected to V
CC
to force it high continuously.
PGND (Exposed Pad Pin 17/Pins 1, 10, 11, 20, Exposed
Pad Pin 21):
Power Ground Connections. These pins
should be connected to the power ground in the applica-
tion. The exposed pad is the power ground connection. It
must be soldered to the PCB and electrically connected
to ground through the shortest and lowest impedance
connection possible and to the PCB ground plane for
rated thermal performance.
BLOCK DIAGRAM
Pin numbers are shown for the DHD package only.
CURRENT
LIMIT
+
–
3A
D
A
PGND
C
B
PV
OUT
REVERSE
CURRENT
LIMIT
+
–
–1.5A
ZERO
CURRENT
+
–
0A
3
V
IN
PV
CC
*
10
11
BST2
12
BST1
13
V
CC
*
V
CC
V
IN
V
IN
2.4V
0.5µA
9
SW2
2
GATE
DRIVES
PGND
SOFT-START
RAMP
1000mV
SW1
15
PV
IN
14
FB
7
VC
REVERSE
BLOCKING
LDO
BANDGAP
REFERENCE
OVERTEMPERATURE
OSCILLATOR
MODE
SELECTION
1000mV
1.21V
PWM
CHIP
ENABLE
EXPOSED
PAD
BURST
/PWM
(PWM MODE IF PWM/SYNC
IS HIGH OR SWITCHING)
V
IN
÷
+
+
–
6
RT
8
PWM/SYNC
*PV
CC
AND V
CC
MUST BE CONNECTED TOGETHER IN THE APPLICATION
THE EXPOSED PAD IS AN ELECTRICAL CONNECTION AND MUST BE SOLDERED
TO THE BOARD AND ELECTRICALLY CONNECTED TO GROUND
16
INPUT UVLO
+
–
1.21V
PGND
GND
+
–
2.4V
V
CC
UVLO
+
–
RUN
3115 BD
1
17
4
GND
5
