Lattice Semiconductor
Multi-Channel DMA Controller User’s Guide
24
Appendix for ORCA
®
Series 4 FPGAs
Table 18. Performance and Resource Utilization
1
Supplied Netlist Configurations
The Ordering Part Number (OPN) for all configurations of this core in ORCA Series 4 devices is DMA-MC-O4-N2.
Table 19 lists the Lattice-specific netlists that are available in the Evaluation Package, which can be downloaded
from the Lattice web site at www.latticesemi.com.
Table 19. Core Configuration
Mode
Name of Parameter File
LUTs
ORCA 4
PFUs
2
Registers
sysMEM™
EBRs
I/O
f
MAX
(MHz)
8237
dma_mc_o4_2_001.lpc
1258
200
524
N/A
59
58
Non-8237
dma_mc_o4_2_002.lpc
2661
499
1187
N/A
125
66
1. Performance and utilization characteristics are generated using OR4E02-2PBGAM680-DE in Lattice’s ispLEVER 3.0 SP1 software. Syn-
thesized using Synplicity
®
Synplify
®
7.03. When using this IP core in a different density, package, speed, or grade within the ORCA family,
performance may vary.
2. PFU is a standard logic block of some Lattice devices. For more information, check the data sheet of the device.
Name of
Parameter File
Number of Channels
Data Bus Width
Address Bus Width
Word Count Width
8237 Mode
dma_mc_o4_2_001.lpc
4
8
16
16
Non-8237 Mode
dma_mc_o4_2_002.lpc
4
32
32
16