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CP6500-V

6U CompactPCI

Intel® Celeron® Based CPU Board

Manual ID: 28945, Rev. Index 01

04 March, 2005

The product described in this manual is
in compliance with all applied CE stan-
dards.

P R E L I M I N A R Y

USER GUIDE

2894

5.01.UG.VC.050304/09094

8

Summary of Contents for CP6500-V

Page 1: ...I Intel Celeron Based CPU Board Manual ID 28945 Rev Index 01 04 March 2005 The product described in this manual is in compliance with all applied CE stan dards P R E L I M I N A R Y USER GUIDE 28945 0...

Page 2: ...our Internet web site www kontron com Copyright Copyright 2005 Kontron Modular Computers GmbH All rights reserved This manual may not be copied photocopied reproduced translated or converted to any el...

Page 3: ...Instructions xv Special Handling and Unpacking Instructions xv General Instructions on Usage xvi Two Year Warranty xvii Chapter 1 1 Introduction 1 3 1 1 System Overview 1 3 1 2 Board Overview 1 4 1 2...

Page 4: ...Watchdog Timer 2 6 2 2 3 Battery 2 6 2 2 4 Reset 2 7 2 2 5 SMBus Devices 2 7 2 2 6 Thermal Management System Monitoring 2 7 2 2 7 Serial EEPROM 2 8 2 2 8 FLASH Memory 2 8 2 2 8 1 BIOS FLASH Firmware H...

Page 5: ...4 2 2 19 3 Peripheral Master Configuration Passive Mode 2 24 2 2 19 4 Packet Switching Backplane PICMG 2 16 2 24 2 2 19 5 Hot Swap Support 2 24 2 2 19 6 Power Ramping 2 25 2 2 19 7 Precharge 2 25 2 2...

Page 6: ...h Power Configuration 4 3 4 1 3 Clearing BIOS CMOS Setup 4 3 4 1 4 Shorting Chassis GND Shield to Logic GND 4 4 4 1 5 VGA CRT Rear I O Configuration 4 4 4 1 6 Front I and Front II General Purpose LEDs...

Page 7: ...2 LED Control Register 4 18 4 5 13 Hot Swap LED Control Register 4 19 Chapter 5 5 BIOS 5 3 Chapter 6 6 Power Consumption 6 3 6 1 System Power 6 3 6 1 1 CP6500 V Baseboard 6 3 6 1 2 Backplane 6 4 6 1 3...

Page 8: ...ions 7 3 7 1 Passive Thermal Regulation 7 3 7 1 1 CPU External Thermal Supervision 7 3 7 1 2 CPU Emergency Thermal Supervision 7 4 7 1 3 Thermal Management Recommendations 7 4 7 2 Active Thermal Regul...

Page 9: ...nnector J10 Pinout 2 14 2 10 Serial Port Connectors CON9 COM1 Pinout 2 15 2 11 Pinouts of J6A B Based on the Implementation 2 17 2 12 Pinout of EIDE Connector J19 2 19 2 13 Pinout of EIDE Connector J2...

Page 10: ...15 Memory Map for the 1st Megabyte 4 9 4 16 I O Address Map 4 10 4 17 Watchdog Timer Register 4 12 4 18 Geographic Addressing Register 4 13 4 19 Watchdog CompactPCI Interrupt Configuration Register 4...

Page 11: ...2 3 USB Connectors J7 and J8 2 11 2 4 D SUB CRT Connector J10 2 14 2 5 PC Compatible D SUB Serial Connectors J9 COM1 2 15 2 6 Dual Fast Ethernet Connector J6A B 2 16 2 7 EIDE Interface Connectors J19...

Page 12: ...Preface CP6500 V Page xii 2005 Kontron Modular Computers GmbH ID 28945 Rev 01 P R E L I M I N A R Y 28945 01 UG VC 050304 090948 This page has been intentionally left blank...

Page 13: ...in this document Kontron Modular Computers GmbH reserves the right to change modify or improve this document or the product described herein as seen fit by Kontron Modular Computers GmbH without furth...

Page 14: ...in damage to your material Please refer also to the section High Voltage Safety Instructions on the following page Warning ESD Sensitive Device This symbol and title inform that electronic boards and...

Page 15: ...the product with his her hands or tools This is most easily done by touching a metal part of your system housing It is particularly important to observe standard anti static precautions when changing...

Page 16: ...s that fulfill all necessary technical and specific environmental requirements This applies also to the operational temperature range of the specific board version which must not be exceeded If batter...

Page 17: ...own discretion or to refund the original cost of purchase if appropriate In the event of repair re funding or replacement of any part the ownership of the removed or replaced parts reverts to Kontron...

Page 18: ...Preface CP6500 V Page xviii 2005 Kontron Modular Computers GmbH ID 28945 Rev 01 P R E L I M I N A R Y 28945 01 UG VC 050304 090950 This page has been intentionally left blank...

Page 19: ...CP6500 V Introduction ID 28945 Rev 01 2005 Kontron Modular Computers GmbH Page 1 1 Introduction Chapter 1 1 P R E L I M I N A R Y 28945 01 UG VC 050304 090951...

Page 20: ...Introduction CP6500 V Page 1 2 2005 Kontron Modular Computers GmbH ID 28945 Rev 01 P R E L I M I N A R Y 28945 01 UG VC 050304 090951 This page has been intentionally left blank...

Page 21: ...tPCI System Manual includes the following information Common information that is applicable to all system components such as safety information warranty conditions standard connector pinouts etc All t...

Page 22: ...n the PCI bus in accordance with the PICMG 2 3 specification a Low Pin Count interface LPC rear I O with several interfaces one CompactFlash socket and a built in Intel 3D Graphics accelerator with a...

Page 23: ...panel and PCI functionality Two Fast Ethernet interfaces on the front panel switchable to rear I O PICMG 2 16 Two EIDE Ultra ATA 100 interfaces Optional socket for 2 5 hard disk Onboard CompactFlash t...

Page 24: ...00 V Note The CP CTM80 2 rear I O module provides only USB 1 1 ports Table 1 1 System Relevant Information SUBJECT INFORMATION System Slot System Master Functionality The CP6500 V is designed for use...

Page 25: ...nt Panel Connectors CPU Secondary EIDE LPC J5 CPCI J3 CPCI RTC Floppy EIDE Secondary PMC REAR I O VGA COM1 2 KB Mouse USB3 4 2 0 PICMG 2 16 CPCI 32 bit 33 MHz Hotswap J4 CPCI Floppy ICH4 I O Hub J1 J2...

Page 26: ...ose LEDs WD green Watchdog when lit during boot up it indicates a PCI reset is active TH green Overtemperature Status when lit during boot up it indicates a power failure HS blue Hot Swap Control Fron...

Page 27: ...Board Layout Figure 1 3 CP6500 V Board Layout Top View J9 J8 J7 J6 WD TH LEDs HS LED RST J10 J5 J4 J3 J2 J1 PCI to PCI Bridge Fast Eth Fast Eth CPU ICH4 815 B0 SDRAM Socket CompactFlash Socket Battery...

Page 28: ...5 Kontron Modular Computers GmbH ID 28945 Rev 01 P R E L I M I N A R Y 28945 01 UG VC 050304 090951 Figure 1 4 CP6500 V Board Layout Bottom View C205 C224 C64 C63 JP1 JP6 JP5 JP8 R330 JP4 JP3 R320 JP7...

Page 29: ...sh socket type II true IDE mode with DMA capability Serial EEPROM 24LC64 8 kB for storing CMOS data when operating without battery Chipsets Intel 815 B0 GMCH 815 B0 Graphics Memory Controller Hub GMCH...

Page 30: ...cation Rev 2 0 January 17 2001 VGA Built in Intel 2D and 3D Graphics accelerator Supports resolutions of up to 1600 x 1200 by 8 bit color resolution at a 75 Hz refresh rate or up to 1280 x 1024 by 24...

Page 31: ...ks I O Extension Interface I O extension interface LPC devices Sockets Front Panel Connectors VGA 15 pin D SUB connector USB two 4 pin connectors Ethernet up to two RJ 45 connectors COM 9 pin D SUB co...

Page 32: ...Management CPU overtemperature protection is provided by CPU shut down via hardware monitor Custom designed heat sinks System Monitor Integrated HW monitoring in Winbond Super I O W83627HF for the sup...

Page 33: ...1 oct min 10 cycles axis 3 axes Shock IEC60068 2 27 30 g 9 ms 3 shocks per direction 6 directions 5 s recovery time Bump IEC60068 2 29 15 g 11 ms 500 bumps per direction 6 directions 1 s recovery time...

Page 34: ...ssessing a maintenance agreement with Kontron can be guaranteed hotline software support and are supplied with regular software updates A dedicated web site is also provided for online updates and rel...

Page 35: ...CP6500 V Functional Description ID 28945 Rev 01 2005 Kontron Modular Computers GmbH Page 2 1 Functional Description Chapter 1 2 P R E L I M I N A R Y 28945 01 UG VC 050304 090952...

Page 36: ...Functional Description CP6500 V Page 2 2 2005 Kontron Modular Computers GmbH ID 28945 Rev 01 P R E L I M I N A R Y 28945 01 UG VC 050304 090952 This page has been intentionally left blank...

Page 37: ...ion cache and 16 kB write back data cache On die second level cache with Advanced Transfer Cache Architecture Intel Celeron with 256 kB L2 cache Advanced Branch Prediction and Data Prefetch Logic Stre...

Page 38: ...ified SDRAMs from Kontron Modular Computers ca be used with the CP6500 V 2 1 3 815 B0 Chipset Overview The Intel 815 B0 chipset consists of the following devices 815 B0 Graphics and Memory Controller...

Page 39: ...ivering high perfor mance 3D and 2D video capabilities The internal graphics controller provides interfaces for a standard progressive scan monitor TV Out device and TMDS transmitter These interfaces...

Page 40: ...watchdog timer is enabled it cannot be stopped 2 2 3 Battery The CP6500 V is provided with a 3 0 V coin cell lithium battery for the RTC To replace the battery proceed as follows Turn off power Remov...

Page 41: ...og overflow CompactPCI backplane PRST input 2 2 5 SMBus Devices The CP6500 V provides a System Management Bus SMBus for access to several system monitoring and configuration functions The SM Bus consi...

Page 42: ...available You may easily upgrade your BIOS using the AMI utility For detailed information on BIOS refer to Appendix B 2 2 8 2 CompactFlash Socket To enable flexible flash extension a CompactFlash CF...

Page 43: ...4 3 4 D05 Data 5 I O I O Data 6 D06 5 6 D07 Data 7 I O O Chip select 0 IDE_CS0 7 8 GND A10 GND ATASEL 9 10 GND A09 GND A08 11 12 GND A07 5 V Power VCC 5 V 13 14 GND A06 GND A05 15 16 GND A04 GND A03 1...

Page 44: ...set Together Front I and Front II indicate a two place hexadecimal num ber Front II is the lower nibble Front I is the higher nibble An one is indicated by a lit LED The LSB is 0 the MSB is 7 Default...

Page 45: ...peed USB USB 1 1 One USB peripheral may be connected to each port To connect more than four USB devices an external hub is required The USB power supply provides 500 mA continuous load current and 900...

Page 46: ...r software MPEG2 decode 2 2 12 1 Video Memory Usage The 815 B0 chipset supports the new Dynamic Video Memory Technology D V M T This new technology ensures the most efficient use of all available memo...

Page 47: ...HZ 8 BIT INDEXED 16 BIT 24 BIT 320x200 70 70 70 320x240 70 70 70 352x480 70 70 70 352x576 70 70 70 400x300 70 70 70 512x384 70 70 70 640x400 70 70 70 640x480 60 70 72 75 85 60 70 72 75 85 60 70 72 75...

Page 48: ...to the CP6500 V board Table 2 9 CRT Connector J10 Pinout PIN SIGNAL FUNCTION I O 1 Red Red video signal output O 2 Green Green video signal output O 3 Blue Blue video signal output O 4 NC Not connecte...

Page 49: ...ompatible D SUB Serial Connectors J9 COM1 The COM interface may be configured as either RS232 or RS422 by setting the appropriate solder jumpers The standard setting of the COM port envisages the RS23...

Page 50: ...hitecture includes independent transmit and receive queues to limit PCI bus traffic The Boot from LAN feature is supported The following figure illustrates the pinout and LED positioning of the J6A B...

Page 51: ...The EIDE interfaces support the following modes Programmed I O PIO CPU controls data transfer 8237 style DMA DMA offloads the CPU supporting transfer rates of up to 16 MB sec Ultra DMA DMA protocol on...

Page 52: ...tFlash socket J14 The secondary EIDE interface is a 40 pin 2 row male connector J20 AT standard interface for an EIDE hard disk This interface is also available at rear I O The onboard 2 5 HDD can be...

Page 53: ...a 5 HD5 7 8 HD10 HD data 10 I O I O HD data 4 HD4 9 10 HD11 HD data 11 I O I O HD data 3 HD3 11 12 HD12 HD data 12 I O I O HD data 2 HD2 13 14 HD13 HD data 13 I O I O HD data 1 HD1 15 16 HD14 HD data...

Page 54: ...12 Table 2 13 Pinout of EIDE Connector J20 I O FUNCTION SIGNAL PIN PIN SIGNAL FUNCTION I O O Reset HD IDERESET 1 2 GND Ground signal I O HD data 7 HD7 3 4 HD8 HD data 8 I O I O HD data 6 HD6 5 6 HD9 H...

Page 55: ...rt supports 33 MHz The Jn3 connector is for the 64 bit CompactPCI bus and is not populated User defined I O signals are supported Jn4 and are connected to the CompactPCI rear I O connector J4 This int...

Page 56: ...9 20 Signal Signal 21 22 Signal Ground 21 22 Signal Signal 23 24 Ground Signal 23 24 3 3V Ground 25 26 Signal Signal 25 26 Signal Signal 27 28 Signal 3 3V 27 28 Signal Signal 29 30 5V Signal 29 30 Gro...

Page 57: ...O 21 22 Rear I O Rear I O 23 24 Rear I O Rear I O 25 26 Rear I O Rear I O 27 28 Rear I O Rear I O 29 30 Rear I O Rear I O 31 32 Rear I O Rear I O 33 34 Rear I O Rear I O 35 36 Rear I O Rear I O 37 38...

Page 58: ...ge allows the primary and secondary PCI bus to operate concurrently A master and target on the same PCI bus can communicate while the other PCI bus is busy 2 2 19 3 Peripheral Master Configuration Pas...

Page 59: ...PCI bus connected to a 1V reference voltage 2 2 19 8 Handle Switch A microswitch is situated in the extractor handle Opening the handle initiates the generation of a local interrupt produced by the on...

Page 60: ...trial environments and to support multiple slots 2 2 20 1 CompactPCI Connector Keying CompactPCI connectors support guide lugs to ensure a correct polar ized mating A proper mating is further assured...

Page 61: ...GND 22 GND AD 7 GND 3 3V AD 6 AD 5 GND 21 GND 3 3V AD 9 AD 8 M66EN C BE 0 GND 20 GND AD 12 GND V I O AD 11 AD 10 GND 19 GND 3 3V AD 15 AD 14 GND AD 13 GND 18 GND SERR GND 3 3V PAR C BE 1 GND 17 GND 3...

Page 62: ...GND 10 GND GND 3 3V GND 9 GND NC GND GND 8 GND GND V I O GND 7 GND GND GND 6 GND NC 3 3V GND 5 GND NC NC GND GND 4 GND NC Healthy V I O INTP INTS GND 3 GND 5V GND 2 GND TCK 5V TMS NC TDI GND 1 GND 5V...

Page 63: ...5 GND NC GND FAL REQ5 GNT5 GND 14 GND AD 35 AD 34 AD 33 GND AD 32 GND 13 GND AD 38 GND V I O AD 37 AD 36 GND 12 GND AD 42 AD 41 AD 40 GND AD 39 GND 11 GND AD 45 GND V I O AD 44 AD 43 GND 10 GND AD 49...

Page 64: ...GND 11 GND GND V I O GND 10 GND GND GND 9 GND GND V I O GND 8 GND GND GND 7 GND GND V I O GND 6 GND GND GND 5 GND GND V I O GND 4 GND V I O NC GND GND 3 GND CLK4 GND GNT3 REQ4 GNT4 GND 2 GND CLK2 CLK...

Page 65: ...rd 6U CompactPCI passive backplanes with rear I O support on the system slot The CP6500 V conducts all I O signals through the rear I O connectors J3 J4 and J5 Table 2 21 Backplane J3 Pinout PIN ROW Z...

Page 66: ...o supply the RIO board with power and must not be supplied with external power Failure to comply with the above may result in damage to your board Table 2 22 Backplane J3 Signals SIGNAL DESCRIPTION SP...

Page 67: ...GND 11 GND PIM 33 PIM 35 GND PIM 34 PIM 36 GND 12 14 Key Area 15 GND PIM 29 PIM 31 GND PIM 30 PIM 32 GND 16 GND PIM 25 PIM 27 GND PIM 26 PIM 28 GND 17 GND GND GND GND GND GND GND 18 GND PIM 21 PIM 23...

Page 68: ...MTR0 FD INDEX GND FD FDEDIN FD DENSEL GND 12 GND FD DIR FD MTR1 GND FD DSEL0 FD DSEL1 GND 13 GND FD TRK0 FD WGATE GND FD WDATA FD STEP GND 14 GND FD DSKCHG FD HDSEL GND FD RDATA FD WRPROT GND 15 GND I...

Page 69: ...lable via the rear I O The USB power comes from the baseboard and it is protected by a self resettable fuse Secondary EIDE Interface Only one EIDE connector may be used at any one time through the sam...

Page 70: ...Functional Description CP6500 V Page 2 36 2005 Kontron Modular Computers GmbH ID 28945 Rev 01 P R E L I M I N A R Y 28945 01 UG VC 050304 090952 This page has been intentionally left blank...

Page 71: ...CP6500 V Installation ID 28945 Rev 01 2005 Kontron Modular Computers GmbH Page 3 1 Installation Chapter 1 3 P R E L I M I N A R Y 28945 01 UG VC 050304 090953...

Page 72: ...Installation CP6500 V Page 3 2 2005 Kontron Modular Computers GmbH ID 28945 Rev 01 P R E L I M I N A R Y 28945 01 UG VC 050304 090953 This page has been intentionally left blank...

Page 73: ...m of storage container until such time as the board and heat sink have cooled down to room temperature Caution If your board type is not specifically qualified as being hot swap capable switch off the...

Page 74: ...applied to the system before proceeding 2 Carefully insert the board into the slot designated by the application requirements for the board until it makes contact with the backplane connectors 3 Usin...

Page 75: ...ral slot its hot swap capabilities depend on the type of backplane in use and the system controller s capabil ities The reason for this being that communications with the system controller requires ei...

Page 76: ...board 5 Unscrew the front panel retaining screws 6 Using the ejector handles disengage the board from the backplane and carefully remove it from the system 7 Dispose of the old board as required obser...

Page 77: ...n varies considerably The following chapters provide information regarding installation aspects and not detailed procedures 3 5 1 CompactFlash Installation The CompactFlash socket supports CompactFlas...

Page 78: ...is necessary to perform the following operations in the given order 1 Install the hardware Note It is strongly recommended to use COM1 only on the front or rear I O panel Note Care must be taken to e...

Page 79: ...lled HDDs are Hard disk drives are not auto detected may be a Master Slave problem or a bad IDE cable Contact your vendor Hard Disk Drive Fail message at boot up may be a bad cable or lack of power go...

Page 80: ...Installation CP6500 V Page 3 10 2005 Kontron Modular Computers GmbH ID 28945 Rev 01 P R E L I M I N A R Y 28945 01 UG VC 050304 090953 This page has been intentionally left blank...

Page 81: ...CP6500 V Configuration ID 28945 Rev 01 2005 Kontron Modular Computers GmbH Page 4 1 Configuration Chapter 1 4 P R E L I M I N A R Y 28945 01 UG VC 050304 090954...

Page 82: ...Configuration CP6500 V Page 4 2 2005 Kontron Modular Computers GmbH ID 28945 Rev 01 P R E L I M I N A R Y 28945 01 UG VC 050304 090954 This page has been intentionally left blank...

Page 83: ...setting the CMOS setting may be cleared using jumper JP1 Procedure for clearing CMOS setting The system is booted with the jumper in the new closed position then powered down again The jumper is rese...

Page 84: ...use or indicating the POST code during boot up When POST code is selected the General Purpose LEDs indicate POST code during BIOS boot up If not required to indicate POST code they can be used as gen...

Page 85: ...rs and Resistors The default setting is indicated by using italic bold RS422 and RS485 COM1 Termination When COM1 is configured for RS422 operation and is the last device on the RS422 bus then the RS4...

Page 86: ...various operational modes Figure 4 2 COM2 Configuration Jumpers and Resistors The default setting is indicated by using italic bold Table 4 9 Jumper Setting for RS422 TXD and RS485 Termination COM1 T...

Page 87: ...RS422 or RS485 interface must provide termination resistance The purpose of jumpers JP3 and JP4 is to enable this line termination resistor 120 ohm The default setting is indicated by using italic bol...

Page 88: ...8 IRQ15 IRQ3 11 COM2 IRQ4 12 COM1 IRQ5 13 Watchdog IRQ6 14 Floppy Disk Controller IRQ7 15 Free IRQ8 3 System Real Time Clock IRQ9 4 PCI or ACPI IRQ10 5 PCI IRQ11 6 PCI IRQ12 7 PCI or PS 2 mouse IRQ13...

Page 89: ...Interrupt Routing ICH4 IRQ INPUT PCI DEVICE CHIPSET DEVICE PIRQA PMC INTA USBI front VGA PIRQB PMC INTB Fast Ethernet I SMBus PIRQC PMC INTC Fast Ethernet II USBIII unused PIRQD PMC INTD USBII rear PI...

Page 90: ...43 Timer 060 063 Keyboard interface 070 071 RTC port 080 08F DMA page register 0A0 0AF Interrupt controller 2 0C0 0DF DMA controller 2 0E0 0EF Reserved 0F0 0FF Math coprocessor 170 17F Hard disk secon...

Page 91: ...of the 0x282 register must be set If the watchdog is enabled via bit 4 this bit cannot be cleared later With a write access to the 0x280 register the watchdog is retriggered Once the watchdog is enabl...

Page 92: ...3 0 Timeout Period Bits 3 2 1 0 Setting 0 0 0 0 0 000 125 sec 0 0 0 1 1 000 250 sec 0 0 1 0 2 000 500 sec 0 0 1 1 3 001 sec 0 1 0 0 4 002 sec 0 1 0 1 5 004 sec 0 1 1 0 6 008 sec 0 1 1 1 7 016 sec 1 0...

Page 93: ...geographic addressing sig nals Table 4 18 Geographic Addressing Register REGISTER NAME Geographic Addressing Register ACCESS ADDRESS 0x283 R BIT POSITION MSB 7 6 5 4 3 2 1 0 LSB CONTENT Res Res Res G...

Page 94: ...AME Interrupt Configuration Register ACCESS ADDRESS 0x284 R W BIT POSITION MSB 7 6 5 4 3 2 1 0 LSB CONTENT WNMI CFNMI CFIRQ CEIRQ CDIRQ WRST WIRQ HSIRQ DEFAULT 0 0 0 0 0 0 0 0 BIT NAME VAL DESCRIPTION...

Page 95: ...a system slot the reset is always an output If the reset is disabled the CP6500 V ignores the reset signal from the CompactPCI interface Table 4 20 CPCI Master Reset Register REGISTER NAME CPCI Maste...

Page 96: ...mpactPCI board Table 4 21 I O Status Register REGISTER NAME I O Status Register ACCESS ADDRESS 0x286 R BIT POSITION MSB 7 6 5 4 3 2 1 0 LSB CONTENT WST Res Res Res CSLOT CENUM CFAIL CDER DEFAULT 1 0 0...

Page 97: ...ot swap control signals Table 4 23 Hardware Index Register REGISTER NAME Hardware Index Register ACCESS ADDRESS 0x289 R BIT POSITION MSB 7 6 5 4 3 2 1 0 LSB CONTENT HWI7 HWI6 HWI5 HWI4 HWI3 HWI2 HWI1...

Page 98: ...ster REGISTER NAME Logic Version ACCESS ADDRESS 0x28B R BIT POSITION MSB 7 6 5 4 3 2 1 0 LSB CONTENT LR7 LR6 LR5 LR4 LR3 LR2 LR1 LR0 DEFAULT 0 0 0 0 0 0 0 0 Table 4 26 LED Control Register REGISTER NA...

Page 99: ...on and off the hot swap LED on the front panel Table 4 27 Hot Swap LED Control Register REGISTER NAME Hot Swap LED Control Register ACCESS ADDRESS 0x28E R W BIT POSITION MSB 7 6 5 4 3 2 1 0 LSB CONTEN...

Page 100: ...Configuration CP6500 V Page 4 20 2005 Kontron Modular Computers GmbH ID 28945 Rev 01 P R E L I M I N A R Y 28945 01 UG VC 050304 090954 This page has been intentionally left blank...

Page 101: ...CP6500 V BIOS ID 28945 Rev 01 2005 Kontron Modular Computers GmbH Page 5 1 BIOS Chapter 1 5 P R E L I M I N A R Y 28945 01 UG VC 050304 090955...

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Page 103: ...BIOS ID 28945 Rev 01 2005 Kontron Modular Computers GmbH Page 5 3 P R E L I M I N A R Y 28945 01 UG VC 050304 090955 5 BIOS Detailed information concerning the BIOS for the CP6500 V is contained in Ap...

Page 104: ...BIOS CP6500 V Page 5 4 2005 Kontron Modular Computers GmbH ID 28945 Rev 01 P R E L I M I N A R Y 28945 01 UG VC 050304 090955 This page has been intentionally left blank...

Page 105: ...CP6500 V Power Consumption ID 28945 Rev 01 2005 Kontron Modular Computers GmbH Page 6 1 Power Consumption Chapter 1 6 P R E L I M I N A R Y 28945 01 UG VC 050304 090955...

Page 106: ...Power Consumption CP6500 V Page 6 2 2005 Kontron Modular Computers GmbH ID 28945 Rev 01 P R E L I M I N A R Y 28945 01 UG VC 050304 090955 This page has been intentionally left blank...

Page 107: ...V should be carefully tested to ensure compli ance with these ratings The following table specifies the ranges for the different input power voltages within which the board is functional The CP6500 V...

Page 108: ...as much power as the entire system requires As the design of the CP6500 V has been optimized for minimal power consumption the power supply unit shall be stable even without minimum load Where possibl...

Page 109: ...e output reaches its minimum in regulation level and from 3 3 VDC until the output reaches its minimum in regulation level must be 20 ms 6 1 3 3 Tolerance The tolerance of the voltage lines is describ...

Page 110: ...P3 SVE180 AC Power Supply Note Non industrial ATX PSUs require a greater minimum load than a single CP6500 V is capable of creating When a PSU of this type is used it will not power up correctly and t...

Page 111: ...ard disk The operating systems used were DOS and Windows 2000 All measurements were conducted at a temperature of 25 C The measured values varied because the power con sumption was dependent on proces...

Page 112: ...contact Kontron Modular Computers Technical Support Table 6 6 Power Consumption Windows 2000 100 CPU Usage POWER CELERON 400 MHz 256 MB CELERON 1 0 GHz 256 MB Core 0 95 V 1 145 V 5 V 4 75 W 10 98 W 3...

Page 113: ...CP6500 V System Considerations ID 28945 Rev 01 2005 Kontron Modular Computers GmbH Page 7 1 System Considerations Chapter 1 7 P R E L I M I N A R Y 28945 01 UG VC 050304 090956...

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Page 115: ...ernal elements of the proces sor 2 Thermtrip In the event of a cooling failure resulting in extreme overheating the processor will auto matically shut down when the die temperature has reached approxi...

Page 116: ...ement feature allows system de signers to design lower cost thermal solutions without compromising system integrity or reliabil ity In this case the external Thermal Monitor should be enabled This mon...

Page 117: ...te temperature sensor To ensure functionality at the maximum temperature the BIOS supports a temperature control feature In instances of overtemperature the hardware monitor will reduce the processor...

Page 118: ...ating temperature the processor junction temperature must never exceed the specified limit for the involved processor type 7 2 3 Peripherals When determining the thermal requirements for a given appli...

Page 119: ...CP6500 V CP CTM80 2 RIO Module ID 28945 Rev 01 2005 Kontron Modular Computers GmbH Page A 1 CP CTM80 2 RIO Module Appendix 1 A 28945 01 UG VC 050304 090957 P R E L I M I N A R Y...

Page 120: ...CP CTM80 2 RIO Module CP6500 V Page A 2 2005 Kontron Modular Computers GmbH ID 28945 Rev 01 28945 01 UG VC 050304 090957 P R E L I M I N A R Y This page has been intentionally left blank...

Page 121: ...h have been de signed for use both in a PICMG 2 16 and a non PICMG 2 16 environment Everything that can be routed through the front panel may also be routed through the rear I O A particular advantage...

Page 122: ...M80 2 RIO Module 4HP Variant J 1 9 1 3 5 4 2 6 USB1 USB2 MOUSE KBD SCSI VHDCI VGA LAN2 LAN1 COM 1 22 1 1 19 15 11 25 1 J11 J13 SCSI External VHDCI USB 2 USB 1 VGA PS 2 MOUSE KEYBOARD LAN 2 LAN 1 COM 1...

Page 123: ...CP6500 V AMIBIOS8 ID 28945 Rev 01 2005 Kontron Modular Computers GmbH Page B 1 AMIBIOS8 Appendix 1 B P R E L I M I N A R Y 28945 01 UG VC 050304 090958...

Page 124: ...AMIBIOS8 CP6500 V Page B 2 2005 Kontron Modular Computers GmbH ID 28945 Rev 01 P R E L I M I N A R Y 28945 01 UG VC 050304 090958 This page has been intentionally left blank...

Page 125: ...01 2005 Kontron Modular Computers GmbH Page B 3 P R E L I M I N A R Y 28945 01 UG VC 050304 090958 B AMIBIOS8 Attached to this appendix is the original AMIBIOS8 description as modified by Kontron Modu...

Page 126: ...AMIBIOS8 CP6500 V This page has been intentionally left blank Page B 4 2005 Kontron Modular Computers GmbH ID 28945 Rev 01 P R E L I M I N A R Y 28945 01 UG VC 050304 090958...

Page 127: ...CP6500 V Setup for AMIBIOS8 MAN EZP 80 07 12 02...

Page 128: ...loss expenses or damages of any kind whatsoever whether direct indirect incidental or consequential arising from the design or use of this product or the support materials provided with the product Tr...

Page 129: ...Detect Time Out Seconds 10 Advanced BIOS Setup Continued 11 ATA PI 80 pin Cable Detection 11 Advanced BIOS Setup Continued 12 PRIMARY AND SECONDARY IDE MASTER AND SLAVE SUB MENU 12 Primary and Second...

Page 130: ...iguration 23 Remote Access 23 Advanced BIOS Setup Continued 24 Serial Port Number 24 Serial Port Mode 24 Advanced BIOS Setup Continued 25 USB CONFIGURATION 25 USB Configuration 25 USB Function 25 USB...

Page 131: ...e Supervisor Password 37 Security Setup Continued 38 Change User Password 38 Clear User Password 38 Chapter 7 Chipset Setup 39 NORTH BRIDGE CONFIGURATION 39 North Bridge Configuration 39 Chipset Setup...

Page 132: ...it Menu 47 Save Changes and Exit 47 Exit Menu Continued 48 Discard Changes and Exit 48 Discard Changes 48 Load Optimal Defaults 48 Exit Menu Continued 49 Load Fail Safe Defaults 49 Chapter 10 Deleting...

Page 133: ...screens follow the steps below Step Description 1 Power on the motherboard 2 Press the Delete key on your keyboard when you see the following text prompt Press DEL to run Setup 3 After you press the...

Page 134: ...tions cannot be configured Options is blue can be The right frame displays the key legend Above the key legend is an area reserved for a text message When an option is selected in the left frame it is...

Page 135: ...Minus The Plus and Minus Arrow keys allow you to change the field value of a particular setup item For example Date and Time Tab The Tab key allows you to select CP6500 V setup fields Note The F8 key...

Page 136: ...l and then press the Enter key to abort this function and return to the previous screen ESC The Esc key allows you to discard any changes you have made and exit the CP6500 V Setup Press the Esc key to...

Page 137: ...ection The Main BIOS Setup screen is shown below System Time System Date Use this option to change the system time and date Highlight System Time or System Date using the Arrow keys Enter new values t...

Page 138: ...6 Chapter 2 Main Setup This page has been intentionally left blank...

Page 139: ...elect any of the items in the left frame of the screen such as SuperIO Configuration to go to the sub menu for that item You can display an Advanced BIOS Setup option by highlighting it using the Arro...

Page 140: ...his screen for Board information or to select the Intel Speed Step options Use the Plus and Minus keys to change the value of the selected option A description of the item appears on the right side of...

Page 141: ...ings Use the up and down Arrow keys to select an item Use the Plus and Minus keys to change the value of the selected option A description of the selected item appears on the right side of the screen...

Page 142: ...rmally Read write and erase functions can be performed to the hard disk drive This is the default setting Enabled Set this value to prevent the hard disk drive from being erased IDE Detect Time Out Se...

Page 143: ...isk drive to detect the type of IDE cable used The use of an 80 conductor ATA cable is mandatory for running Ultra ATA 66 Ultra ATA 100 and Ultra ATA 133 IDE hard disk drives The standard 40 conductor...

Page 144: ...g pages The screen for the Primary IDE Master is shown below Drive Parameters The grayed out items in the left frame are the IDE disk drive parameters taken from the firmware of the IDE disk drive sel...

Page 145: ...e on the specified channel Auto Set this value to allow the BIOS auto detect the IDE disk drive type attached to the specified channel This setting should be used if an IDE hard disk drive is attached...

Page 146: ...alue to allow the BIOS to use PIO mode 2 It has a data transfer rate of 8 3 MBs 3 Set this value to allow the BIOS to use PIO mode 3 It has a data transfer rate of 11 1 MBs 4 Set this value to allow t...

Page 147: ...allow the BIOS to auto detect hard disk drive support Use this setting if the IDE disk drive support cannot be determined This is the default setting Disabled Set this value to prevent the BIOS from u...

Page 148: ...iguration Settings You can use this screen to specify options for the Floppy Configuration Settings Use the up and down Arrow keys to select an item Use the Plus and Minus keys to change the value of...

Page 149: ...hould be set if no floppy disk drive is installed on the specified channel 360 KB 5 Set this value if the floppy disk drive attached to the corresponding channel is a 360 KB 5 floppy disk drive 1 2 MB...

Page 150: ...SuperIO Configuration Screen You can use this screen to select options for the Super I O settings Use the up and down Arrow keys to select an item Use the Plus and Minus keys to change the value of th...

Page 151: ...he interrupt address If the system will not use a serial device it is best to set this port to Disabled Serial Port2 Address This option specifies the base I O port address and Interrupt Request addre...

Page 152: ...Set this value to allow the system to utilize the Intel ACPI Advanced Configuration and Power Interface specification The Optimal and Fail Safe default setting is Yes Option Description No This setti...

Page 153: ...item appears on the right side of the screen The settings are described on this page The screen is shown below ACPI 2 0 Feature Set this value to allow or prevent the system to be complaint with the...

Page 154: ...splays all unread events e g 01 01 02 13 12 56 CMOS time not set Mark all events as read Mark all unread events as read and clear the Event Log buffer Clear Event Log Discard all events in the Event L...

Page 155: ...s keys to change the value of the selected option The settings are described on the following pages The screen is shown below Remote Access You can disable or enable the BIOS remote access feature her...

Page 156: ...the system to use COM2 Communication port2 for the remote access interface Serial Port Mode Select the baud rate you want the serial port to use for console redirection Option Description 115200 8 n...

Page 157: ...wing pages The screen is shown below USB Function Set this value to allow the system to enable or disable the onboard USB ports The Optimal and Fail Safe default setting is Enabled Option Description...

Page 158: ...26 Chapter 3 Advanced BIOS Setup This page has been intentionally left blank...

Page 159: ...elow Plug and Play O S Set this value to allow the system to modify the settings for Plug and Play operating system support The Optimal and Fail Safe default setting is No Option Description No The No...

Page 160: ...ing the VGA adapter card an interrupt address The Optimal and Fail Safe default setting is Yes Option Description Yes Set this value to allow the allocation of an IRQ to a VGA adapter card that uses t...

Page 161: ...s not have a PCI Slot 3 If the motherboard does not have a PCI Slot 3 do not use this setting PCI Slot4 This setting will select PCI Slot 4 as the location of the OffBoard PCI IDE adapter card Use thi...

Page 162: ...etting allows the specified DMA to be used by a legacy ISA device Reserved Memory Size Set this value to allow the system to reserve memory that is used by ISA devices The optimal and Fail Safe defaul...

Page 163: ...f the screen such as Boot Device Priority to go to the sub menu for that item You can display a Boot BIOS Setup option by highlighting it using the Arrow keys All Boot Setup options are described in t...

Page 164: ...Option Description Disabled Set this value to allow the BIOS to perform all POST tests Enabled Set this value to allow the BIOS to skip certain POST tests to boot faster Add On ROM Display Mode Set th...

Page 165: ...default setting Wait for F1 If Error Set this value to allow the Wait for F1 Error setting to be modified The Optimal and Fail Safe default setting is Enabled Option Description Disabled This prevents...

Page 166: ...nts option ROMs from trapping interrupt 19 Enabled The BIOS allows option ROMs to trap interrupt 19 BOOT DEVICES 1st Boot Device 2nd Boot Device 3rd Boot Device Set the boot device options to determin...

Page 167: ...User password The Supervisor and User passwords activate two different levels of password security If you select password support you are prompted for a one to six character password Type the password...

Page 168: ...m and press Enter Change Supervisor Password Change User Password Clear User Password The Security Setup screen is shown below The sub menus are documented on the following pages Supervisor Password I...

Page 169: ...r protection CP6500 V displays a warning when any program or virus issues a Disk Format command or attempts to write to the boot sector of the hard disk drive If enabled the following appears when a w...

Page 170: ...f the password confirmation is incorrect an error message appears The password is stored in NVRAM after CP6500 V completes Clear User Password Select Clear User Password from the Security Setup menu a...

Page 171: ...Setup options are described in this section The Chipset BIOS Setup screen is shown below NORTH BRIDGE CONFIGURATION North Bridge Configuration You can use this screen to select options for the North...

Page 172: ...guration South Bridge is a chipset on the motherboard that controls the basic I O functions USB ports audio functions modem functions IDE channels and PCI slots Use the up and down Arrow keys to selec...

Page 173: ...n You can display a Kontron BIOS Setup option by highlighting it using the Arrow keys All OEM Feature BIOS Setup options are described in this section CLOCK SPREADING The Optimal and Fail Safe default...

Page 174: ...o Thermal Throttling Auto Thermo Throttling reduces CPU speed to avoid overheating Temperature Range is from 90 C up to 105 C CPU Performance The CPU performance will be reduced to the selected value...

Page 175: ...Feature Continued LAN BOOT Etherboot ROM Enable LAN Boot To save RAM space for other expansion ROMs e g SCSI this feature is disabled Ethernet Port 1 2 For Rear I O designs the Ethernet ports can b e...

Page 176: ...board register This must always correspond with the CPU on which the BIOS is installed Compare the value with the table below System Slot Displays whether the board is in a system Slot or not Serial N...

Page 177: ...e that there will be different handling of such devices The standard does not define configuration rules for class code FF By setting this field to Yes these non standard boards will also be configure...

Page 178: ...signal indicates that the power supply is beginning to derate its power output Watchdog Mode Option Description Disabled NMI Reset Cascade NMI Reset Watchdog routing to NMI NMI Reset or Reset WD Activ...

Page 179: ...scribed in this section The Exit BIOS Setup screen is shown below Save Changes and Exit When you have completed the system configuration changes select this option to leave CP6500 V Setup and reboot t...

Page 180: ...Exit Setup Now Ok Cancel appears in the window Select Ok to discard changes and exit Discard Changes Select Discard Changes from the Exit menu and press Enter Select Ok to discard changes Load Optimal...

Page 181: ...6500 V automatically sets all CP6500 V Setup options to a complete set of default settings when you Select this option The Fail Safe settings are designed for maximum system stability but not maximum...

Page 182: ...50 Chapter 9 Exit Menu This page has been intentionally left blank...

Page 183: ...re the passwords are stored System configuration data is stored in CMOS RAM a type of memory that consumes very little power Erase Old Password You can drain CMOS RAM power by using the CMOS drain jum...

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Page 185: ...ional chipset initialization Re enable CACHE Verify that flat mode is enabled D4 Test base 512KB memory Adjust policies and cache first 8MB Set stack D5 Bootblock code is copied from ROM to lower syst...

Page 186: ...E9 EF Read error occurred on media Jump back to checkpoint EB E9 or EA Determine information about root directory of recovery media F0 Search for pre defined recovery file name in root directory F1 Re...

Page 187: ...CPU The BAT test is being done on KBC Program the keyboard controller command byte is being done after Auto detection of KB MS using AMI KB 5 C0 Early CPU Init Start Disable Cache Init Local APIC C1...

Page 188: ...evices controlled by BIOS and option ROMs 7A Initializes remaining option ROMs 7C Generate and write contents of ESCD in NVRam 84 Log errors encountered during POST 85 Display errors to the user and g...

Page 189: ...tializes all static devices that include manual configured onboard peripherals memory and I O decode windows in PCI PCI bridges and noncompliant PCI devices Static resources are also reserved Function...

Page 190: ...58 Chapter 11 POST Codes This page has been intentionally left blank...

Page 191: ...ive Parameters 12 E Erase Old Password 51 53 Exit Discarding Changes 48 Exit Saving Changes 47 ezPORT Password Support 35 ezPORT Setup Menu 2 F FLOPPY CONFIGURATION SCREEN 16 Floppy Configuration Sett...

Page 192: ...s 15 Serial Port Mode 24 Serial Port Number 24 Serial Port1 Address 19 Serial Port2 Address 19 South Bridge Configuration 40 SOUTH BRIDGE CONFIGURATION 40 SUPER IO CONFIGURATION SCREEN 18 SuperIO Conf...

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