Appendix C: Status model
Models 707B and 708B Switching Matrix Reference Manual
C-10
707B-901-01 Rev. A / August 2010
The bits used in this register set are described as follows:
•
Bit B0, Operation Complete (OPC):
Set bit indicates that all pending selected device operations
are completed and the instrument is ready to accept new commands. The bit is set in response to
an *OPC command. The ICL function
opc()
can be used in place of the *OPC command.
•
Bit B1:
Not used.
•
Bit B2, Query Error (QYE):
Set bit indicates that you attempted to read data from an empty
Output queue.
•
Bit B3, Device-Dependent Error (DDE):
Set bit indicates that an instrument operation did not
execute properly due to some internal condition.
•
Bit B4, Execution Error (EXE):
Set bit indicates that the instrument detected an error while
trying to execute a command.
•
Bit B5, Command Error (CME):
Set bit indicates that a command error has occurred. Command
errors include:
•
IEEE-488.2 syntax error: The instrument received a message that does not follow the defined syntax of
the IEEE-488.2 standard.
•
Semantic error: instrument received a command that was misspelled or received an optional IEEE-
488.2 command that is not implemented.
•
GET error: The instrument received a Group Execute Trigger (GET) inside a program message.
•
Bit B6, User Request (URQ):
Set bit indicates that the LOCAL key on the instrument front panel
was pressed.
•
Bit B7, Power ON (PON):
Set bit indicates that the instrument has been turned off and turned
back on since the last time this register has been read.
Master summary status bit (MSS bit register)
The master summary status bit provides summary information to Bit 6 (MSS) of the status byte.
Although this bit is always enabled for the status byte, it has to be enabled (using
status.node_enable)
if needed in an expanded system (TSP-link).
The Master Summary Status Bit (MSS) is set when an enabled summary bit of the Status Byte
Register is set. This bit (B6) may also be interpreted as a Request Service (RQS) bit. Depending on
how it is used, Bit B6 of the Status Byte Register is either the Request for Service (RQS) bit or the
Master Summary Status (MSS) bit.
When using the GPIB serial poll sequence of the Switching Matrix to obtain the status byte (serial poll
byte), B6 is the RQS bit. See
(on page C-17) for details on using the serial poll
sequence. For common and script commands (Status Byte Register), B6 is the MSS (Message
Summary Status) bit. The serial poll, although automatically resetting the RQS bit, does not clear
MSS. The MSS will stay set until all Status Byte summary bits are reset.
