NANO-ULT5 SBC
Page 29
Pin
Description
Pin
Description
31
NC
32
NC
33
GND
34
NC
35
P
36
GND
37
PCIE_TX0-
38
NC
39
GND
40
NC
41
P
42
NC
43
PCIE_RX0-
44
NC
45
GND
46
NC
47
CL
48
NC
49
CLK_PCIE0-
50
NC
51
GND
52
BUF_PLT_RST#
53
PCIE_CLKREQ#
54
Pull Up +V3.3A
55
PCIE_WAKE#
56
Pull Up +V3.3A
57
GND
58
NC
59
P
60
NC
61
PCIE_TX1-
62
NC
63
GND
64
NC
65
P
66
NC
67
PCIE_RX1-
68
NC
69
GND
70
NC
71
CL
72
+V3.3A
73
CLK_PCIE1-
74
+V3.3A
75
GND
Table 3-12: M.2 A-Key Slot Pinouts
Summary of Contents for NANO-ULT5
Page 2: ...NANO ULT5 SBC Page II Revision Date Version Changes May 21 2019 1 00 Initial release...
Page 14: ......
Page 15: ...NANO ULT5 SBC Page 1 Chapter 1 1 Introduction...
Page 24: ...NANO ULT5 SBC Page 10 Chapter 2 2 Unpacking...
Page 28: ...NANO ULT5 SBC Page 14 Chapter 3 3 Connectors...
Page 66: ...NANO ULT5 SBC Page 52 Chapter 4 4 Installation...
Page 89: ...NANO ULT5 SBC Page 75 Chapter 5 5 BIOS...
Page 128: ...NANO ULT5 SBC Page 114 Chapter 6 6 Software Drivers...
Page 132: ...NANO ULT5 SBC Page 118 Appendix A A Regulatory Compliance...
Page 134: ...NANO ULT5 SBC Page 120 B Product Disposal Appendix B...
Page 136: ...NANO ULT5 SBC Page 122 Appendix C C BIOS Menu Options...
Page 139: ...NANO ULT5 SBC Page 125 Appendix D D Digital I O Interface...
Page 142: ...NANO ULT5 SBC Page 128 Appendix E E Watchdog Timer...
Page 145: ...NANO ULT5 SBC Page 131 Appendix F F Hazardous Materials Disclosure...