IDT Tsi310TM, User Manual

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Tsi310 User Manual
80B6020_MA001_05
6. Signals and Pinout
This chapter discusses the following topics:
• “Overview of Signals and Pinout” on page 151
• “Primary Interface Signals” on page 151
• “Secondary Interface Signals” on page 154
• “Strapping Pins and Other Signals” on page 157
• “Test Signals” on page 160
• “Power and Ground Connections” on page 161
• “Pinout” on page 163
6.1 Overview of Signals and Pinout
The Tsi310 is a 304-pin device. The following sections explain Tsi310’s signal groups,
characteristics, and pinout. Throughout this section, trailing pound signs, for example
P_ACK64#, designate signals that are active low.
6.2 Primary Interface Signals
Table 13: Primary Interface Signals
Signal Name I/O Width Description
P_ACK64# I/O 1 Acknowledge 64-Bit Transfer: Asserted by the currently addressed
target on the primary bus to indicate its willingness to transfer data
using 64 bits.
P_AD(63:00) I/O 64 Multiplexed Address and Data: 64-bit multiplexed address and data
bus, shared by other devices on the primary bus. During a
transaction, this bus contains the physical bus address, attributes, or
data, or it may be reserved.
P_C/BE(7:0)# I/O 8 Multiplexed Bus Command and Byte Enables: During a transaction,
these eight bits define the bus command, attributes, or byte enables
for the transfer. These signals are shared with other agents on the
primary bus and at times may be reserved.
P_CLK I 1 Clock: Received by the bridge; it provides timing for all operations on
the primary interface.