5. Configuration Registers
88
Tsi310 User Manual
80B6020_MA001_05
5.4.17
I/O Base Register
The I/O Base register specifies the base of the I/O address range bits 15:12 and is used in
conjunction with the I/O limit register and I/O base upper 16 bits and I/O limit upper 16 bits
registers to specify a range of 32-bit addresses supported for I/O transactions on the PCI bus.
Address bits 11:0 are assumed to be x‘000’ for the base address. This register also specifies that
the bridge supports 32-bit I/O addressing.
Address Offset
x‘1C’
Access
See individual fields
Reset Value
x‘X1’
I/O Base Address
32-Bit
Addressing
7
6
5
4
3
2
1
0
Bit(s)
Access
Field Name and Description
7:4
RW
I/O Base Address
Address bits 15:12 of the base address for the address range of I/O operations that are passed
from the primary to the secondary PCI bus.
3:0
RO
Set to b‘0001’ to indicate that 32-bit I/O addressing is supported.
Summary of Contents for Tsi310TM
Page 8: ...Contents 8 Tsi310 User Manual 80B6020_MA001_05...
Page 10: ...List of Figures 10 Tsi310 User Manual 80B6020_MA001_05...
Page 12: ...List of Tables 12 Tsi310 User Manual 80B6020_MA001_05...
Page 18: ...18 Tsi310 User Manual 80B6020_MA001_05...
Page 44: ...2 Bus Operation 44 Tsi310 User Manual 80B6020_MA001_05...
Page 58: ...3 Clocking and Reset Options 58 Tsi310 User Manual 80B6020_MA001_05...
Page 62: ...4 Transaction Ordering 62 Tsi310 User Manual 80B6020_MA001_05...
Page 150: ...5 Configuration Registers 150 Tsi310 User Manual 80B6020_MA001_05...
Page 170: ...6 Signals and Pinout 170 Tsi310 User Manual 80B6020_MA001_05...
Page 190: ...7 JTAG Boundary Scan 190 Tsi310 User Manual 80B6020_MA001_05...
Page 196: ...8 Electrical Characteristics 196 Tsi310 User Manual 80B6020_MA001_05...
Page 200: ...9 Package Information 200 Tsi310 User Manual 80B6020_MA001_05...
Page 202: ...A Ordering Information 202 Tsi310 User Manual 80B6020_MA001_05...
Page 206: ...Index 206 Tsi310 User Manual 80B6020_MA001_05...