IDT 89HPES12N3, User Manual

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IDT SMBus Interfaces Master SMBus Interface
PES12N3 User Manual 7 - 7 June 7, 2006
Notes
If during serial EEPROM initialization, an attempt is made to initialize a register that is not defined in a
configuration space (i.e., does not appear in Tables 9.6, 9.7, or 9.8), then the Unmapped Register Initializa-
tion Attempt (URIA) bit is set in the SMBUSSTS register and the write is ignored.
The configuration done sequence consists of two fields and its format is shown in Figure 7.3. The
CHECKSUM field contains the checksum of all of the bytes in all of the fields read from the serial EEPROM
from the first configuration block to the end of this done sequence. The second field is the TYPE field which
is always 0x3 for configuration done sequences.
Figure 7.4 Configuration Done Sequence Format
The checksum in the configuration done sequence enables the integrity of the serial EEPROM initializa-
tion to be verified. Since uninitialized EEPROMs typically have a value of all ones, initialization from an
uninitialized serial EEPROM will result in a checksum mismatch.
The checksum is computed in the following manner.An 8-bit counter is initialized to zero and the 8-bit
sum is computed over the configuration bytes stored in the serial EEPROM, including the entire contents of
the configuration done sequence, with the checksum field initialized to zero.
1
The 1’s complement of this
sum is placed in the checksum field.
The checksum is verified in the following manner. An 8-bit counter is cleared and the 8-bit sum is
computed over the bytes read from the serial EEPROM, including the entire contents of the configuration
done sequence.
2
The correct result should always be 0xFF (i.e., all ones). Checksum checking may be
disabled by setting the Ignore Checksum Errors (ICHECKSUM) bit in the port A SMBus Control
(PA_SMBUSCTL) register.
If an error is detected during loading of the serial EEPROM, then loading of the serial EEPROM is
aborted and the RSTHALT bit is set in the PA_SWCTL register. This allows debugging of the error condition
via the slave SMBus interface but prevents normal system operation with a potentially incorrectly initialized
device. Error information is recorded in the PA_SMBUSSTS register. Once serial EEPROM initialization
completes, or when an error is detected, the EEPROM Done (EEPROMDONE) bit is set in the port A
SMBus Status (PA_SMBSTS) register.
A summary of possible errors during serial EEPROM initialization and specific action taken when
detected is summarized in Table 7.6.
1.
This includes the byte containing the TYPE field.
2.
This includes the checksum byte as well as the byte that contains the type and reserved field.
Bit
0
Bit
1
Bit
2
Bit
3
Bit
4
Bit
5
Bit
6
Bit
7
Byte 0 CHECKSUM[7:0]
Reserved TYPE
0x3
Byte 1
(must be zero)