IDT Transparent Mode Operation
Generic PCI to PCI Bridge Register Definition
PES12N3 User Manual
9 - 28
June 7, 2006
Notes
PCIEDCTL - PCI Express Device Control (0x048)
14
PIP
RWL
0x0
Power Indicator Present. When set, this bit indicates that
a Power Indicator is implemented on the card/module. This
bit should not be set on downstream ports.
25:18
CSPLV
RO
0x0
Captured Slot Power Limit Value. (Upstream Port A only,
hardwired to zero in downstream ports) Captured Slot
Power Limit Value (upstream Ports only, hardwired to zero
in downstream ports) – In combination with the Slot Power
Limit Scale value, specifies the upper limit on power sup-
plied by slot.Power limit (in Watts) calculated by multiplying
the value in this field by the value in the Slot Power Limit
Scale field.
This value is set by the Set_Slot_Power_Limit Message
27:26
CSPLS
RO
0x0
Captured Slot Power Limit Scale. (Upstream Port A only,
hardwired to zero in downstream ports) This field specifies
the scale used for the Slot Power Limit Value and is set via
a Set_Slot_Power_Limit message.
0 -
(v1) 1.0x
1 -
(v1p1) 0.1x
2 -
(v0p01) 0.01x
3 -
(v0p001x) 0.001x
31:28
Reserved
RO
0x0
Reserved.
Bit
Field
Field
Name
Type
Default
Value
Description
0
CEREN
RW
0x0
Correctable Error Reporting Enable. This bit controls
reporting of correctable errors.
1
NFEREN
RW
0x0
Non-Fatal Error Reporting Enable. This bit controls
reporting of non-fatal errors.
2
FEREN
RW
0x0
Fatal Error Reporting Enable. This bit controls reporting
of fatal errors.
3
URREN
RW
0x0
Unsupported Request Reporting Enable. This bit con-
trols reporting of unsupported requests.
4
ERO
RO
0x0
Enable Relaxed Ordering. When set, this bit enables
relaxed ordering. The switch never sets the relaxed order-
ing bit in transactions it initiates as a requester.
7:5
MPS
RW
0x0
Max Payload Size. This field sets maximum TLP payload
size for the device.
0x0 -
(s128) 128 bytes max payload size
0x1 -
(s256) 256 bytes max payload size
0x2 -
(s512) 512 bytes max payload size
0x3 -
(s1024) 1024 bytes max payload size
0x4 -
(s2048) 2048 bytes max payload size
0x5 -
reserved (treated as 128 bytes)
0x6 -
reserved (treated as 128 bytes)
0x7 - reserved (treated as 128 bytes)
Bit
Field
Field
Name
Type
Default
Value
Description
Summary of Contents for 89HPES12N3
Page 10: ...IDT Table of Contents PES12N3 User Manual iv June 7 2006 Notes...
Page 14: ...IDT List of Figures PES12N3 User Manual viii June 7 2006 Notes...
Page 36: ...IDT Clocking Reset and Initialization Reset PES12N3 User Manual 2 8 June 7 2006 Notes...
Page 40: ...IDT Link Operation Slot Power Limit Support PES12N3 User Manual 3 4 June 7 2006 Notes...
Page 50: ...IDT Switch Operation Switch Core Errors PES12N3 User Manual 4 10 June 7 2006 Notes...
Page 54: ...IDT Power Management Active State Power Management PES12N3 User Manual 5 4 June 7 2006 Notes...
Page 62: ...IDT Hot Plug and Hot Swap Hot Swap PES12N3 User Manual 6 8 June 7 2006 Notes...
Page 78: ...IDT SMBus Interfaces Slave SMBus Interface PES12N3 User Manual 7 16 June 7 2006 Notes...
Page 148: ...IDT Test and Debug SerDes Test Clock PES12N3 User Manual 10 6 June 7 2006...
Page 158: ...IDT JTAG Boundary Scan Usage Considerations PES12N3 User Manual 11 10 June 7 2006 Notes...