HT82M75REW/HT82K75REW
Rev. 1.00
77
June 11, 2010
·
LREG0x20A - SLPCAL_1: Sleep Clock Calibration 1
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
SLPCAL15 SLPCAL14 SLPCAL13 SLPCAL12 SLPCAL11 SLPCAL10
SLPCAL9
SLPCAL8
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
POR
0
0
0
0
0
0
0
0
Bit 7-0
SLPCAL [15:8]
: Sleep Clock Calibration Counter bit 15~8
A 20-bit calibration counter which calibrates the sleep clock. SLPCAL [19:0] indicates the time
period of 16 sleep clock cycles. The unit is 62.5ns, counted by the 16MHz.
·
LREG0x20B - SLPCAL_2: Sleep Clock Calibration 2
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
SLPCALRDY
¾
¾
SLPCALEN SLPCAL19 SLPCAL18 SLPCAL17 SLPCAL16
Type
R
R
R
WT
R/W
R/W
R/W
R/W
POR
0
0
0
0
0
0
0
0
Bit 7
SLPCALRDY
: Sleep Clock Calibration Ready
1: Sleep Clock Calibration counter is ready to be read.
0: Not Ready (default)
Bit 6-5
Reserved: Maintain as
²
0b00
²
Bit 4
SLPCALEN
: Sleep Clock Calibration Enable
1: Starts the Sleep Clock Calibration counter. Bit is automatically cleared to
²
0
²
by hardware
Bit 3-0
SLPCAL [19:16
]: Sleep Clock Calibration Counter bit 19~16
A 20-bit calibration counter which calibrates the sleep clock. SLPCAL [19:0] indicates the time
period of 16 sleep clock cycles. The unit is 62.5ns, counted by the 16MHz.
·
LREG0x211 - IRQCTRL: Interrupt Control Register
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
¾
¾
¾
¾
¾
¾
IRQPOL
¾
Type
R
R
R
R
R
R
R/W
R
POR
0
0
0
0
0
0
0
0
Bit 7~2
Reserved: Maintain as
²
0b000000
²
Bit 1
IRQPOL
: Interrupt Edge Polarity
1: Rising Edge
0: Falling Edge (default)
Bit 0
Reserved: Maintain as
²
0b0
²
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