HT82M75REW/HT82K75REW
Rev. 1.00
25
June 11, 2010
Timer Program Example
This program example shows how the Timer/Event Counter registers are setup, along with how the interrupts are en-
abled and managed. Note how the Timer/Event Counter is turned on, by setting bit 4 of the Timer Control Register. The
Timer/Event Counter can be turned off in a similar way by clearing the same bit. This example program sets the
Timer/Event Counter to be in the timer mode, which uses the internal system clock as the clock source.
org 04h
reti
org 08h
; Timer/Event Counter interrupt vector
jmp tmrint
; jump here when Timer overflows
:
org 20h
; main program
;internal Timer/Event Counter interrupt routine
tmrint:
:
; Timer/Event Counter main program placed here
:
reti
:
:
begin:
;setup Timer registers
mov a,09bh
; setup Timer low register
mov tmrl,a;
; load low register first
mov a, 0aah
; setup timer high register
mov tmrh,a
mov a,080h
; setup Timer control register
mov tmrc,a
; timer mode is used
; setup interrupt register
mov a,005h
; enable master interrupt and timer interrupt
mov intc,a
set tmrc.4
; start Timer/Event Counter - note mode bits must be previously setup
Interrupts
Interrupts are an important part of any microcontroller
system. When an internal function such as a
Timer/Event Counter overflow, their corresponding in-
terrupt will enforce a temporary suspension of the main
program allowing the microcontroller to direct attention
to their respective needs. These devices contain sev-
eral interrupts generated by internal interrupts events
and external interrupt.
Interrupt Register
Overall interrupt control, which means interrupt enabling
and request flag setting, is controlled by a single inter-
rupt control register, which is located in the Data Mem-
ory. By controlling the appropriate enable bits in this
register the interrupt can be enabled or disabled. Also
when an interrupt occurs, the request flag will be set by
the microcontroller. The global enable bit if cleared to
zero will disable all interrupts.
Interrupt Operation
A Timer/Event Counter overflow, will generate an inter-
rupt request by setting its corresponding request flag, if
its interrupt enable bit is set. When this happens, the
Program Counter, which stores the address of the next
instruction to be executed, will be transferred onto the
stack. The Program Counter will then be loaded with a
new address which will be the value of the correspond-
ing interrupt vector. The microcontroller will then fetch
its next instruction from this interrupt vector. The instruc-
tion at this vector will usually be a JMP statement which
will jump to another section of program which is known
as the interrupt service routine. Here is located the code
to control the appropriate interrupt. The interrupt service
routine must be terminated with a RETI statement,
which retrieves the original Program Counter address
from the stack and allows the microcontroller to continue
with normal execution at the point where the interrupt
occurred.
Once an interrupt subroutine is serviced, other inter-
rupts will be blocked, as the EMI bit will be cleared auto-
matically. This will prevent any further interrupt nesting
from occurring. However, if other interrupt requests oc-
cur during this interval, although the interrupt will not be
immediately serviced, the request flag will still be re-
corded. If an interrupt requires immediate servicing
while the program is already in another interrupt service
routine, the EMI bit should be set after entering the rou-
tine, to allow interrupt nesting. If the stack is full, the in-
terrupt request will not be acknowledged, even if the
related interrupt is enabled, until the Stack Pointer is
decremented. If immediate service is desired, the stack
must be prevented from becoming full.
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