Holtek HT82K75REW, Manual

Page: 66 / 103

HT82M75REW/HT82K75REW
Rev. 1.00 66 June 11, 2010
·
SREG0x06 - DADR_1: Device Address 1
Bit Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Name DADR15 DADR14 DADR13 DADR12 DADR11 DADR10 DADR9 DADR8
Type R/W R/W R/W R/W R/W R/W R/W R/W
POR 0 0 0 0 0 0 0 0
Bit 7~0 DADR [15:8] : 32-bit Address of the RF Transceiver
·
SREG0x07 - DADR_2: Device Address 2
Bit Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Name DADR23 DADR22 DADR21 DADR20 DADR19 DADR18 DADR17 DADR16
Type R/W R/W R/W R/W R/W R/W R/W R/W
POR 0 0 0 0 0 0 0 0
Bit 7~0 DADR [23:16] : 32-bit Address of the RF Transceiver.
·
SREG0x08 - DADR_3: Device Address 3
Bit Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Name DADR31 DADR30 DADR29 DADR28 DADR27 DADR26 DADR25 DADR24
Type R/W R/W R/W R/W R/W R/W R/W R/W
POR 0 0 0 0 0 0 0 0
Bit 7~0 DADR [31:24] : 32-bit Address of the RF Transceiver
·
SREG0x0D - RXFLUSH: Receive FIFO Flush
Bit Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Name
¾ ¾ ¾ ¾ ¾
PTX
¾
RXFLUSH
Type R R R R R R/W R WT
POR 0 1 1 0 0 0 0 0
Bit 7 Reserved: maintain as
²
0b0
²
Bit 6-5 Reserved: maintain as
²
0b11
²
Bit 4-3 Reserved: maintain as
²
0b00
²
Bit 2 PTX : Primary TX mode enable (1)
1: primary TX mode
0: primary RX mode (default)
Note: RF reset, SREG0x36 [2], is needed after switching between PTX and PRX modes
Bit 1 Reserved: maintain as
²
0b0
²
Bit 0 RXFLUSH : Flush the RX FIFO
1: Flush RX FIFO. RX FIFO data is not modified. If Ping-pong FIFO is enabled
(SREG0x34 [0] =1), both FIFOs are flushed at the same time. Bit is automatically cleared to
²
0
²
by hardware.
Downloaded from Elcodis.com electronic components distributor