PCIe-24DSI32
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A-4
Table 3.3.1. Configuration Operations
Operation
Maximum Duration
PCI configuration registers are loaded from internal EEPROM
3 ms
Internal control logic is configured from internal ROM
300 ms
Internal control logic is initialized
3 ms
Rate generator clocks are initialized
250 ms
Table 3.4. Analog Input Function Selection
AIM[..0]
FUNCTION OR MODE
0
Differential analog input mode.
1
(Reserved).
2
ZERO test. Internal ground reference is connected to all analog input channels.
3
+VREF test. Internal voltage reference is connected to all analog input channels.
Table 3.4.3. Analog Input Range Selection
RANGE[1..0]
ANALOG INPUT RANGE
0
±2.5 Volts
1
±2.5 Volts
2
±5 Volts
3
±10 Volts
Table 3.5.2. Input Data Buffer Organization
Offset: 0000 0030h
Default: XXXX XXXXh
SELECTED
DATA WIDTH
RESERVED (Zero)
CHANNEL TAG
ZERO-PAD
CHANNEL DATA VALUE
16 Bits
D[31..29]
D[28..24]
D[23..16]
D[15..0]
18 Bits
D[31..29]
D[28..24]
D[23..18]
D[17..0]
20 Bits
D[31..29]
D[28..24]
D[23..20]
D[19..0]
24 Bits
D[31..29]
D[28..24]
---
D[23..0]
