PCIe-24DSI32
_____________________________________________________________________________
General Standards Corporation Ph:(256)880-8787 FAX:(256)880-8788 Email: [email protected]
3-9
Rate Generator
Assignment
Code
Ch 00-31
Fgen
Rate Scaler
2
Ext Clk
Input
Ext Clk Output
Target
Internal Rate Generator
20-55 MHZ
Nvco
Nref
PLL Oscillator
Mode Decode
Rate Divisor Ndiv
ADC
Sample
Clock
Ch 00-31
Rate Gen Out
Chan-00 Clock
Initiator
Local ADC Sync
Ext Sync Output
Target
Initiator
Internal Clocking;
Rate Assign = 0
External Clocking;
Rate Assign = 4 or 5
Ext Sync Input
Local
Software Sync
ADC
Clocking
Mode
20-55 MHZ
Figure 3.6.1.1. ADC Clock and Sync Organization, 32 Channels
Table 3.6.1.1. Channel Groups
CHANNEL
GROUP
32-CHAN
BOARD
16-CHAN
BOARD
8-CHAN
BOARD
0
00-07
00-03
00,01
1
08-15
04-07
02,03
2
16-23
08-11
04,05
3
24-31
12-15
06,07
