Interface
5-94
C141-E224
Table 5.25 Information to be read by IDENTIFY DEVICE command (2/3)
Word Value
Description
65
X’0078’
Minimum multiword DMA transfer cycle time per word: 120 [ns]
66
X’0078’
Manufacturer’s recommended DMA transfer cycle time: 120 [ns]
67 X’00F0’
Minimum PIO transfer cycle time without IORDY flow control: 240 [ns]
68
X’0078’
Minimum PIO transfer cycle time with IORDY flow control: 120 [ns]
69-74 X’0000’
Reserved
75 X’001F’
Queue
depth
*11
76
X’0702’
Serial ATA capabilities
*12
77
X’0000’
Reserved for Serial ATA
78
X’004C’
Support of Serial ATA function
*13
79
X’00xx’
Valid of Serial ATA function
*14
80
X’00F8’
Major version number
*11
81
X’0021’
Minor version number
82
X’346B’
Support of command sets
*12
83
X’7F09’
Support of command sets
*13
84
X’60xx’
Support of command sets/function
*14
85
*15
Valid of command sets/function
*15
86
*16
Valid of command sets/function
*16
87
*17
Default of command sets/function
*17
88
X’xx3F’
Ultra DMA transfer mode
*18
89
Set by a device
Security Erase Unit execution time (1 LSB: 2 min.)
*19
90
X’0000’
Enhanced Security Erase Unit execution time (1 LSB: 2 min.)
91
(Variable)
Advance power management level
92
(Variable)
Master password revision
93 X’0000’
COMRESET
Result
94
(Variable)
Acoustic Management level
*21
95-99 X’0000’
Reserved
100-103
X’xx’
Total number of sectors accessible by users in the 48-bit LBA mode
*22
104-105 X’00’ Reserved
106
*26
Physical sector size per logical sector
107-116 X’0000’ Reserved
Summary of Contents for MHV2040BH
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Page 86: ...Interface 5 12 C141 E224 Figure 5 2 Example of the circuit for driving Ready LED ...
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