5.3 Host Commands
C141-E224
5-97
*8 Word 59: Transfer sector count currently set by READ/WRITE
MULTIPLE command
Bits 15-9: Reserved
Bit 8:
'1' = Enable the multiple sector transfer
Bits 7-0: Transfer sector count currently set by READ/WRITE MULTIPLE
command without interrupt supports 2, 4, 8 and 16 sectors.
*9 Word 63: Multiword DMA transfer mode
Bits 15-11: Reserved
Bit 10:
'1' = multiword DMA mode 2 is selected.
Bit 9:
'1' = multiword DMA mode 1 is selected.
Bit 8:
'1' = multiword DMA mode 0 is selected.
Bits 7-3:
Reserved
Bit 2:
'1' = Multiword DMA mode 2, 1, and 0 supported (Bit 1 = 0 = '1')
Bit 1:
'1' = Multiword DMA mode 1, and 0 supported (Bit 0 = '1')
Bit 0:
'1' = Mode 0
*10 Word 64: Advance PIO transfer mode support status
Bits 15-8: Reserved
Bits 7-0:
Advance PIO transfer mode
Bit 1:
'1' = Mode 4 supported
Bit 0:
'1' = Mode 3 supported
*11 WORD 75: X ' 001F ' (32)
*12 WORD 76
Bits 15-11: Reserved
Bit 10:
'1' = Supports the PHY event counter.
Bit 9:
'1' = Supports the Power Management initiation request from
the host system.
Bit 8:
'1' = Supports the Native command queueing.
Bits 7-4:
Reserved
Bit 3:
Reserved for SATA
Bit 2:
'1' = Supports the Gen-2 signaling rete.
Bit 1:
'1' = Supports the Gen-1 signaling rete.
Bit 0: Reserved
Summary of Contents for MHV2040BH
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Page 86: ...Interface 5 12 C141 E224 Figure 5 2 Example of the circuit for driving Ready LED ...
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