Freescale Semiconductor MPC8250, Family Reference Manual

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Inverse Multiplexing for ATM (IMA)
MPC8260 PowerQUICC II Family Reference Manual, Rev. 2
33-4 Freescale Semiconductor
(2) can be programmed not to screen out HEC-errorred cells. Most PHYs have this mode available for
IMA also.
33.1.5 ATM Features Not Supported
The following ATM features are not available for IMA links only, but are available for non-IMA links:
• User-defined cells (UDC) (i.e. cells that are not 53 bytes and/or with customized headers)
• Internal rate mode for APC scheduling
33.1.6 Additional Impact on PowerQUICC II Features
If the IDCR recovery feature is used, the following are true:
• One of the IDMA channels are unavailable, and its resources are dedicated instead to the IDCR
master clock function. This can be any IDMA channel (1, 2, 3, or 4).
• PowerQUICC II features sharing the IDMA channel’s parameter RAM page are unavailable.
For more detailed information, refer to Section 33.4.8.2, “IDCR FCC Parameter Shadow.”
33.2 IMA Protocol Overview
This section describes the IMA protocol, not the PowerQUICC II’s IMA microcode.
33.2.1 Introduction
Inverse Multiplexing over ATM (IMA) provides a cost effective solution to carry high speed connections,
for example, T3/E3 and OC-3c/STM-1 links, over already installed low speed connections, for example,
T1/E1 links, in a flexible way by dynamically adding/removing links as required, depending on the
bandwidth required.
IMA is defined as transmitting a stream of data over multiple low speed links and recombining the stream
in the correct order at the end. IMA involves inverse multiplexing and de-multiplexing of ATM cells in a
cyclical fashion among links grouped to form a higher bandwidth logical link whose rate is approximately
the sum of the link rates. This is referred to as an IMA group.
Figure 33-1 provides a simple illustration of
ATM Inverse Multiplexing technique in one direction. This technique applies in the opposite direction.