Figure 5.13 Schematic diagram of passive reception interrupt –
OMISSIS
Passive reception means that the synchronization information of the MS is obtained by receiving,
and the transmission synchronization information of the local is updated by the reception. Mainly
used for passive reception of single and duplex.
The MCU sets the receive register to enable passive mode 0x40 is set to 0x43;
The HR_C6000 starts receiving, but before receiving the interrupt, the received register 0x41 needs
to be set to 0x40, and enters the continuous receiving state (called blind reception). After receiving
the receiving interrupt, the internal synchronization mechanism of the chip will establish and
receive signals. Consistent synchronization mechanism, so according to the received data to
determine whether the next time slot is received, the recommended way is to read the cc of 0x52
after receiving the Sys_inter interrupt, to determine whether the synchronization is established. If cc
does not match, configure 0x41 as 0x20 Re-acquisition of synchronization information. If cc
matches, determine the transmission and reception of the next time slot according to the contents of
0x51 register. If the data is correct, write 0x41 to 0x00 to close the reception, and then turn on the
reception when TIME_SLOT_INTER interrupt arrives, the chip will generate The corresponding
RF_rx_inter interrupt uses the interrupt to control the RF module.
In the passive mode, the synchronization mechanism guarantees that if there is receiving
synchronization information and the gap with the existing local synchronization is within 1.25ms,
real-time synchronization adjustment will be performed, if the reception synchronization disappears
(the reception signal disappears, and the control does not control 0x41 for reception), the chip
According to the existing local synchronization information, the 30ms is counted and the
TIME_SLOT_INTER interrupt is provided until the MCU turns off TxEn (0x40 Bit7) and RxEn
(0x40 Bit6); at this time, the MCU can be determined to be passive or active according to the actual
situation;
The parsing frame content of the current receiving time slot (including 196 bit rate 1 data stream,
144 bit rate 3/4 data stream, 96 bit rate 1/2 data stream, 96 bit custom control information frame, 80
bit data frame header or CSBK data frame, 72 bit voice) The frame header and the end of the frame
will give the Sys_Inter interrupt after the t3 time of the next time slot. The MCU can judge the
receive interrupt type according to the interrupt read frame type register 0x82. The 0x51 register
determines the received data frame type and check information, and the 0x52 register judges The
CC match result indicates that the MCU can take the corresponding deframe information from the
RX side RAM space.
4) Passive transmission (passive full duplex)
The passive mode also occurs at the time of full duplex. At this time, full duplex means that the
synchronization information of the MS is obtained by receiving, the system establishes a
